School of Information Technology and Electrical Engineering
Semester One, 2004
Exam Guide
- The exam is open-book with 112 marks available; 100 marks = 100%
- The question breakdown is as follows (each 28 marks)
- QUESTION 1 – Fundamentals of Pipelining and Tomasulo’s Algorithm (Leung)
- QUESTION 2 – Advanced concepts in ILP (Leung)
- QUESTION 3 – Memory-Hierarchy Design (Machanick)
- QUESTION 4 – Trends in ILP and Multiprocessor Systems (Machanick)
- To do well in the exam, you need to apply your knowledge and show understanding
- Questions are aimed at testing the following skills
- quantification: formulate a computation and use it to show a particular result
- systematic analysis: apply a principle or set of principles to arrive at a conclusion
- relating information from multiple sources: be able to put together facts, concepts and techniques from more than one source
Some comment from Simon:
In my part of the course we have covered many concepts (see list at the end of this section). The order I presented the material is based on its difficulty and logical development. Now that the material has been covered, there is NO REASON whatsoever that the order I present is the only order between these concepts. The later concepts can be applied to the earlier ones, for example, we can obtain better performances on the 5-stage MIPS pipeline by the use superscalar techniques. So to answer any questions where the concepts are intermixed, you must understand the material, know the location of any material you need (from books, notes, tutes etc), be able to apply your knowledge and show understanding. Do not simply follow and read the examples and answers on the book/lecture - try it, do it on paper, be able to make necessary changes, be flexible and be prepared to use ALL concepts taught.
The concepts introduced:
- 5-stage MIPS pipeline and its optimisation;
- Hazards and dependences: structural, data, control and exceptions;
- Floating point operations;
- Score-board and Tomasulo's algorithm: structure, process, method, application, understanding and examples;
- Static and dynamically scheduled pipelines;
- Hardware prediction: branches, correlations, target buffers, speculations;
- Multiple issues and high performance instruction delivery;
- Pipeline scheduling using compiler technology;
- Advance technique in compiler: loop unrolling, static branch prediction, identify/test/classify dependences;
- VLIW and optimisation, loop level parallelism, software pipelining and symbolic loop unrolling.
In addition to the tutorial questions, here is a list of extra questions that you can try (in NO particular order):
Q3.6; Q3.9; Q3.14; Q3.15; Q3.18; Q3.30; Q4.2; Q4.3a,b; Q4.8a; Q4.12; Q4.13; QA.1; QA.7a; QA.12
Good luck! Simon.
Philip Machanick and Simon Leung; for general course questions: comp4200@itee.uq.edu.au Last modified: