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[microblaze-uclinux] DDR demo
Our DDR demo for the Insight Virtex2 board is now available on the
downloads page of the mblaze-uclinux website.
Included in the project are two useful ip cores - my_dcm which wraps
around a DCM to generate a primary 66mhz system clock from the 100mhz
board clock, and ddr_clk_gen which contains two DCMS, generating the
clocks required by the DDR controller and maintaining phase relationship
on the external ddr feedback clock. The DDR core timing parameters, and
pin constraints are taken directly from Insight Electronics' DDR demo
Connect a terminal listening at 115200 baud on the Virtex board's serial
port, change to the project directory and do a "make -f system.make
download". The project is currently set in executable mode so it will
just launch the trivial DDR test application (loop through the address
space, write/read a test pattern and repeat).
Note you may need to toggle the system reset (SW1 on the dip switches)
to reset the DCMs. The top segments of the two LED displays should
light up indicating that both DDR DCM clocks have successfully locked.
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