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Re: [microblaze-uclinux] Running uClinux with 8M memory?
On Thu, 2004-09-16 at 00:47, Welson Sun wrote:
> I just modified mbvanilla_net_6_20_a to another board. The major
> modifications are:
> 1. I modified the emc controller cuz I have 8MByte ZBT SRAM. I used
> 0xFF000000 - 0xFF7FFFFF for it.
> 2. I deleted the DDR controller and related DCMs cuz I don't have DDR on my
> 3. Since I haven't go the SDRAM working yet on my board, I have only 8MBytes
> RAM to use.
> 4. I deleted the debug uart cuz I only have one uart port and I used it for
> console uart.
you can keep the uart core and route the RX and TX so some unused pin
locations, I think it's safer this way "cuz" the driver will probe the
uart. I know that you dont't have the second port (the RS323 drivers)
but is no harm in routing RX and TX to some unused pins.
> I have went through the EDK tool flow and written a simple uart test program
> for it. It can run out of bram or I can init the BRAM with the xmd_stub and
> I can use XMD to download and debug the software. Also, I can make the code
> run out of ZBT SRAM.
> I would like to try uClinux quickly on this platform, so I wonder if the
> demo image will just work if I modified my SRAM memory to the original DDR
> space,at least the starting address? Cuz looks like the current SRAM on
> Memec board is not used by uClinux. Is 8M enough? Or in my case, I have to
> modify the kernel source and recompile it to make it work on my platform?
> Sounds like naive questions, but any feedback is appreciated.
I think 8Mb is OK to run uC-linux but I think you should recompile the
kernel, be careful at the peripheral address mapping (I mean you need to
have the same addresses like the demo design) you can give a try with
the existing image just to see if is trying to start (should work at
least the first stage)
what about cache? are you using cache? if yes, did you adjust the cache
settings to accomodate the new RAM range ? (under microblaze parameters)
Another important thing is the clock speed (related the removal of the
DCM) in order for the EMAC to work at 100Mb you need a clock speed
>65Mhz, so keep the DCM there to synthesize the internal clock for your
system - if you have oscillator on board for your desired clock speed
than you don't need the DCM.
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