Re: [microblaze-uclinux] problems booting kernel

[John Carter <mrjohndcarter@xxxxxxxxx>]

hi, thanks for your help.  The processor you sent is working, and I
was just able to boot the kernel I compiled.  I cannot overstate how
excited I was to see the boot up screen.  It seems I have issues with
my EDK, or need to modify something within the mb_vanilla package to
get it to synthesize properly.

these lines upon connection are new:

Instruction Cache Base Address.....0x80000000
Instruction Cache High Address.....0x81ffffff

and:

Data Cache Base Address...0x80000000
Data Cache High Address...0x81ffffff

I'm going to look into this a bit further, but thanks so much for your help.  
jc

On Mon, 22 Nov 2004 14:02:04 +1000, John Williams
<jwilliams@itee.uq.edu.au> wrote:
> Hi John,
> 
> 
> 
> John Carter wrote:
> 
> > I believe the problem is that even after the download, the memory is all 0s.
> >
> > I did: mrd 0x80000000 64 before the dow -data, and it was all 0s.
> > and after the dow, it is still all 0s.
> >
> > I used both my own image.bin, and even the demo.bin, just for a sanity
> > check.  The memory always stays as 0s!
> >
> > I tried downloading it to 0x40000000, and the same deal.  It stays as
> > what it was previously.
> >
> > The memory even refuses to change with mwr!
> 
> This must be broken hardware - either a bad MHS file, or physically bad
> board.  Until you can get the DDR working as expected, anything else is
> useless :(
> 
> You said you are using the Insight v2mb1000 boards?  If you haven't
> already done so, pull the latest version of the mbvanilla_net platform
> and synthesise it from a clean start.  If you connect with xmd/mdm, but
> cannot successfully issue the mwr command, then it suggests your board
> could be physically damaged.
> 
> We had one instance of this with a V2mb1000 board - a visual inspection
> of the DDR chip (it sits under the P160 module) showed some bad joins -
> looking at it under a microscope the tracks and pins looked like rusty
> train tracks!  A drop of something nasty had fallen on one edge of the
> Micron DDR part and corroded all the joints.  We had our workshop lift
> the part, clean it up and resolder - it's worked fine ever since.
> 
> > Is there any chance that this could be some sort of licensing issue?
> > We may not have our licenses configured correctly for the MB.  I
> > remember seeing some sort of evaluation message when synthesizing
> > mb_vanilla.  This may take a few days to get resolved, so I'd like to
> > have reasonable assurance before I request a reinstall.
> 
> That will be the message about the EMAC core - it can be safely ignored
> for now, and is not relevant to your main problem!
> 
> > Is there any chance some kind soul could email me their mb_vanilla for
> > this board, and/or their kernel image?  I'm trying to rule out as many
> > things as possible...
> 
> Attached is a download.bit file that I am using here - it has the MDM
> core in it, so fire up XMD and do "mbconnect mdm", see if you can talk
> to the DDR.
> 
> > my other notion was if I missed some config item to get it working
> > with JTAG?  The documentation *seems* to lean towards dual serial, but
> > it appears to be working with JTAG, the processor is getting
> > downloaded ok, and jboot comes up on the serial terminal.
> 
> Nah, the DDR's the problem, fix that, the rest should follow.
> 
> Regards,
> 
> John
> 
> 
> 


-- 
/* John Carter, BCS
 * MSc Student (CIS) - University of Guelph
 * email=mrjohndcarter@gmail.com
 * site=http://www.jcarter.ca */
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