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Re: [microblaze-uclinux] Booting uClinux

To: microblaze-uclinux@xxxxxxxxxxxxxx
Subject: Re: [microblaze-uclinux] Booting uClinux
From: supernaut <supernaut@xxxxxxxxxxxxxx>
Date: Mon, 18 Apr 2005 01:11:16 -0400
In-reply-to: <425583CA.20702@xilinx.com>
References: <42542C77.2050505@xilinx.com> <425583CA.20702@xilinx.com>
Reply-to: microblaze-uclinux@xxxxxxxxxxxxxx
Sender: owner-microblaze-uclinux@xxxxxxxxxxxxxx
User-agent: Mozilla Thunderbird 1.0.2 (X11/20050328)

Sadly, I am experiencing nearly identical difficulties with my Nu-Horizons S400 Dev Board. I am downloading image.bin to the 8MB SDRAM via XMD's dow command. Running 'con 0x80000000' does indeed boot the kernel until either "Kernel Panic: No init found." or a hang after "Freeing init memory: 32K." I am not using the flash provided by this board due to the fact that my first priority is to get linux running, then concentrate on booting from the flash.

This appears to definitely be due to the init process not being able to find a proper filesystem. I have also found that the memory region at 0x800c3908 is overwritten [possibly] by the "RAM Probe." I'm not entirely sure if this is typical behavior or not. The following is a before & after of that particular memory space:

BEFORE kernel boot:

XMD% mrd 0x800c3908 16
800C3908:   B6A8E3D1
800C390C:   ADE4858C
800C3910:   A26119AF
800C3914:   88EC640A
800C3918:   3F5D9C86
800C391C:   196EB670
800C3920:   390E53C4
800C3924:   6FADF035
800C3928:   932E3A28
800C392C:   40E96469
800C3930:   7E0C8868
800C3934:   2DCD70AA
800C3938:   B4B07570
800C393C:   58A17416
800C3940:   84EBE74C
800C3944:   CD94CFA8

AFTER booting/hanging:

XMD% mrd 0x800c3908 16
800C3908:   2D726F6D
800C390C:   3166732D
800C3910:   00072610
800C3914:   81104A56
800C3918:   524F4D64
800C391C:   69736B00
800C3920:   00000000
800C3924:   00000000
800C3928:   00000049
800C392C:   00000020
800C3930:   00000000
800C3934:   D1FFFF97
800C3938:   2E000000
800C393C:   00000000
800C3940:   00000000
800C3944:   00000000

I built the EDK profile my modifying mbvanilla_net since I do not currently have a copy of EDK 6.3 -- I am using EDK 6.2. The following is the output to my console:

Linux version 2.4.29-uc0 (ryan@plutonium) (gcc version 2.95.3-4 Xilinx EDK 6.3 Build EDK_Gmm.12.2) #9 Mon Apr 18 00:54:35 EDT 2005
On node 0 totalpages: 2048
zone(0): 2048 pages.
zone(1): 0 pages.
zone(2): 0 pages.
CPU: MICROBLAZE
Console: xmbserial on UARTLite
Kernel command line: \0xb8
Calibrating delay loop... 2.47 BogoMIPS
Memory: 8MB = 8MB total
Memory: 6856KB available (585K code, 654K data, 32K init)
Dentry cache hash table entries: 1024 (order: 1, 8192 bytes)
Inode cache hash table entries: 512 (order: 0, 4096 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 2048 (order: 1, 8192 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Microblaze UARTlite serial driver version 1.00
ttyS0 at 0xffff2000 (irq = 1) is a Microblaze UARTlite
ttyS1 at 0xffff4000 (irq = 2) is a Microblaze UARTlite
Starting kswapd
xgpio #0 at 0xFFFF5000 mapped to 0xFFFF5000
Xilinx GPIO registered
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
uclinux[mtd]: RAM probe address=0x800c3908 size=0x73000
uclinux[mtd]: root filesystem index=0
VFS: Mounted root (romfs filesystem) readonly.
Freeing init memory: 32K

And she hangs here. I also attached my MHS and .config files if anyone is willing to be kind enough to help me out. Thanks!

-- Ryan Ahern

John McGrath wrote:

Oh My God!
Well what would you know? Linux Booted....to a point!
I got as far as:

--snip---
Xilinx GPIO registered
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
MBVanilla flash probe(0xff000000,8388608,4): 800000 at ff000000
CFI: Found no Flash device at location zero
Search for id:(00 00) interleave(2) type(2)
Search for id:(00 00) interleave(2) type(2)
Search for id:(00 00) interleave(2) type(2)
Search for id:(00 00) interleave(2) type(1)
Search for id:(00 00) interleave(2) type(1)
Search for id:(00 00) interleave(2) type(1)
Search for id:(00 00) interleave(4) type(2)
Search for id:(00 00) interleave(4) type(2)
Search for id:(00 00) interleave(4) type(2)
Search for id:(00 00) interleave(4) type(1)
Search for id:(00 00) interleave(4) type(1)
Search for id:(00 00) interleave(4) type(1)
JEDEC: Found no Flash device at location zero
MBVanilla ram probe(0x818c58fc,729088,4): b2000 at 818c58fc
Creating 1 MTD partitions on "RAM":
0x00000000-0x000b2000 : "Romfs"
VFS: Mounted root (romfs filesystem) readonly.
Freeing init memory: 32K

and thats where it ended. Dont know how "good" this is..but its a start....
Any idea what is wrong? from GDB it seems to be "stuck" in block_dev.c which is in a directory called fs. Im guessing this has something to do with the ROMFS.

I have 8MB ram, and the .bin file is only about 1.3 megs, but I dont beleive I have explicitly told uClinux the memory size (I assume uclinux-auto does this?)

Any help would be much appreciated!

Cheers
John

#
# Automatically generated by make menuconfig: don't edit
#

#
# Vendor/Product Selection
#
# CONFIG_DEFAULTS_3COM is not set
# CONFIG_DEFAULTS_ADI is not set
# CONFIG_DEFAULTS_AKIZUKI is not set
# CONFIG_DEFAULTS_APPLE is not set
# CONFIG_DEFAULTS_ARCTURUS is not set
# CONFIG_DEFAULTS_ARNEWSH is not set
# CONFIG_DEFAULTS_ATMARKTECHNO is not set
# CONFIG_DEFAULTS_ATMEL is not set
# CONFIG_DEFAULTS_AVNET is not set
# CONFIG_DEFAULTS_CIRRUS is not set
# CONFIG_DEFAULTS_COGENT is not set
# CONFIG_DEFAULTS_CONEXANT is not set
# CONFIG_DEFAULTS_CWLINUX is not set
# CONFIG_DEFAULTS_CYBERGUARD is not set
# CONFIG_DEFAULTS_CYTEK is not set
# CONFIG_DEFAULTS_EXYS is not set
# CONFIG_DEFAULTS_FEITH is not set
# CONFIG_DEFAULTS_FUTURE is not set
# CONFIG_DEFAULTS_GDB is not set
# CONFIG_DEFAULTS_HITACHI is not set
# CONFIG_DEFAULTS_IMT is not set
CONFIG_DEFAULTS_INSIGHT=y
# CONFIG_DEFAULTS_INTEL is not set
# CONFIG_DEFAULTS_KENDINMICREL is not set
# CONFIG_DEFAULTS_LEOX is not set
# CONFIG_DEFAULTS_MECEL is not set
# CONFIG_DEFAULTS_MIDAS is not set
# CONFIG_DEFAULTS_MOTOROLA is not set
# CONFIG_DEFAULTS_NEC is not set
# CONFIG_DEFAULTS_NETSILICON is not set
# CONFIG_DEFAULTS_NETBURNER is not set
# CONFIG_DEFAULTS_NINTENDO is not set
# CONFIG_DEFAULTS_OPENCORES is not set
# CONFIG_DEFAULTS_PROMISE is not set
# CONFIG_DEFAULTS_SNEHA is not set
# CONFIG_DEFAULTS_SSV is not set
# CONFIG_DEFAULTS_SWARM is not set
# CONFIG_DEFAULTS_SAMSUNG is not set
# CONFIG_DEFAULTS_SECUREEDGE is not set
# CONFIG_DEFAULTS_SIGNAL is not set
# CONFIG_DEFAULTS_SNAPGEAR is not set
# CONFIG_DEFAULTS_SOEKRIS is not set
# CONFIG_DEFAULTS_SONY is not set
# CONFIG_DEFAULTS_STRAWBERRYLINUX is not set
# CONFIG_DEFAULTS_TI is not set
# CONFIG_DEFAULTS_TELEIP is not set
# CONFIG_DEFAULTS_TRISCEND is not set
# CONFIG_DEFAULTS_VIA is not set
# CONFIG_DEFAULTS_WEISS is not set
# CONFIG_DEFAULTS_XILINX is not set
# CONFIG_DEFAULTS_SENTEC is not set
# CONFIG_DEFAULTS_INSIGHT_XC2V1K_MICROBLAZE is not set
# CONFIG_DEFAULTS_INSIGHT_XC2VP7_MICROBLAZE is not set
CONFIG_DEFAULTS_INSIGHT_MBVANILLA_NET=y

#
# Kernel/Library/Defaults Selection
#
CONFIG_DEFAULTS_KERNEL_2_4=y
# CONFIG_DEFAULTS_LIBC_NONE is not set
# CONFIG_DEFAULTS_LIBC_GLIBC is not set
# CONFIG_DEFAULTS_LIBC_UC_LIBC is not set
CONFIG_DEFAULTS_LIBC_UCLIBC=y
# CONFIG_DEFAULTS_OVERRIDE is not set
# CONFIG_DEFAULTS_VENDOR is not set
# CONFIG_DEFAULTS_VENDOR_UPDATE is not set
CONFIG_VENDOR=Insight
CONFIG_PRODUCT=mbvanilla_net
CONFIG_LINUXDIR=linux-2.4.x
CONFIG_LIBCDIR=uClibc
CONFIG_LANGUAGE=



# ##############################################################################
# Target Board:	 Memec Design Virtex-2 1000  Development Board
# with P160 Comm Module
# Family:	     virtex2
# Device:	     XCV21000
# Package:
# Speed Grade:	 -6
# Processor:     Microblaze
# Debug interface: On-Chip HW Debug Module
# On Chip Memory :   16 KB
# Total Off Chip Memory :  32 MB
# - SDRAM_8Mx32 =  32 MB
# ##############################################################################
# Parameters
 PARAMETER VERSION = 2.1.0


 PORT sys_clk = sys_clk, DIR = I, SIGIS = CLK
 PORT console_uart_rx = console_uart_rx, DIR = I
 PORT console_uart_tx = console_uart_tx, DIR = O
 PORT gpio = gpio, VEC = [0:7], DIR = IO
 PORT sys_clkfx = sys_clkfx, DIR = O
 PORT sdram_clk = sdram_clk, DIR = O
 PORT sdram_cke = sdram_cke, DIR = O
 PORT sdram_cs_N = sdram_cs_N, DIR = O
 PORT sdram_ras_N = sdram_ras_N, DIR = O
 PORT sdram_cas_N = sdram_cas_N, DIR = O
 PORT sdram_we_N = sdram_we_N, DIR = O
 PORT sdram_dqm = sdram_dqm, VEC = [0:1], DIR = O
 PORT sdram_ba = sdram_ba, VEC = [0:1], DIR = O
 PORT sdram_addr = sdram_addr, VEC = [0:11], DIR = O
 PORT sdram_dq = sdram_dq, VEC = [0:15], DIR = IO
 PORT sys_rst = sys_rst, DIR = I


# PORT sys_rst = sys_rst, DIR = I
# PORT sram_cen = sram_cen, VEC = [0:1], DIR = O
# PORT sram_ben = sram_ben, VEC = [0:3], DIR = O
# PORT sram_data = sram_data, VEC = [0:31], DIR = IO
# PORT sram_wen = sram_wen, DIR = O
# PORT sram_oen = sram_oen, DIR = O
# PORT sram_addr = sram_addr, VEC = [10:29], DIR = O
# PORT sram_rst = sram_rpn, DIR = OUT
# Sub Components
BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER HW_VER = 2.10.a
 PARAMETER C_USE_BARREL = 1
 PARAMETER C_USE_DIV = 1
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER C_NUMBER_OF_PC_BRK = 4
 PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 1
 PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 1
 PARAMETER C_USE_ICACHE = 0
 PARAMETER C_ICACHE_BASEADDR = 0x80000000
 PARAMETER C_ICACHE_HIGHADDR = 0x810000FF
 PARAMETER C_CACHE_BYTE_SIZE = 2048
 PARAMETER C_ADDR_TAG_BITS = 11
 PARAMETER C_USE_DCACHE = 0
 PARAMETER C_DCACHE_BASEADDR = 0x80000000
 PARAMETER C_DCACHE_HIGHADDR = 0x81FFFFFF
 PARAMETER C_DCACHE_BYTE_SIZE = 2048
 PARAMETER C_DCACHE_ADDR_TAG = 11
 PARAMETER C_FSL_LINKS = 1
 BUS_INTERFACE SFSL0 = download_link
 BUS_INTERFACE DLMB = d_lmb_v10
 BUS_INTERFACE ILMB = i_lmb_v10
 BUS_INTERFACE DOPB = d_opb_v20
 BUS_INTERFACE IOPB = d_opb_v20
 PORT CLK = sys_clk
 PORT INTERRUPT = interrupt
END

BEGIN opb_mdm
 PARAMETER INSTANCE = debug_module
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_MB_DBG_PORTS = 1
 PARAMETER C_USE_UART = 1
 PARAMETER C_UART_WIDTH = 8
 PARAMETER C_BASEADDR = 0xFFFFD000
 PARAMETER C_HIGHADDR = 0xFFFFD0FF
 PARAMETER C_WRITE_FSL_PORTS = 1
 BUS_INTERFACE MFSL0 = download_link
 BUS_INTERFACE SOPB = d_opb_v20
 PORT OPB_Clk = sys_clk
END

BEGIN fsl_v20
 PARAMETER INSTANCE = download_link
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT SYS_Rst = sys_rst
 PORT FSL_Clk = sys_clk
END

# BEGIN opb_emc
# PARAMETER INSTANCE = sram_flash
# PARAMETER HW_VER = 1.10.b
# PARAMETER C_OPB_CLK_PERIOD_PS = 20000
# PARAMETER C_NUM_BANKS_MEM = 2
# PARAMETER C_MAX_MEM_WIDTH = 32
# PARAMETER C_MEM0_WIDTH = 32
# PARAMETER C_MEM1_WIDTH = 32
# PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 0
# PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_1 = 0
# PARAMETER C_READ_ADDR_TO_OUT_SLOW_PS_0 = 150000
# PARAMETER C_WRITE_ADDR_TO_OUT_SLOW_PS_0 = 55000
# PARAMETER C_WRITE_MIN_PULSE_WIDTH_PS_0 = 70000
# PARAMETER C_READ_ADDR_TO_OUT_FAST_PS_0 = 150000
# PARAMETER C_WRITE_ADDR_TO_OUT_FAST_PS_0 = 55000
# PARAMETER C_READ_RECOVERY_BEFORE_WRITE_PS_0 = 15000
# PARAMETER C_WRITE_RECOVERY_BEFORE_READ_PS_0 = 35000
# PARAMETER C_READ_ADDR_TO_OUT_SLOW_PS_1 = 150000
# PARAMETER C_WRITE_ADDR_TO_OUT_SLOW_PS_1 = 55000
# PARAMETER C_WRITE_MIN_PULSE_WIDTH_PS_1 = 70000
# PARAMETER C_READ_ADDR_TO_OUT_FAST_PS_1 = 150000
# PARAMETER C_WRITE_ADDR_TO_OUT_FAST_PS_1 = 55000
# PARAMETER C_READ_RECOVERY_BEFORE_WRITE_PS_1 = 15000
# PARAMETER C_WRITE_RECOVERY_BEFORE_READ_PS_1 = 35000
# PARAMETER C_BASEADDR = 0xFFFF0000
# PARAMETER C_HIGHADDR = 0xFFFF01FF
# PARAMETER C_MEM0_BASEADDR = 0xFFE00000
# PARAMETER C_MEM0_HIGHADDR = 0xFFEFFFFF
# PARAMETER C_MEM1_BASEADDR = 0xFF000000
# PARAMETER C_MEM1_HIGHADDR = 0xFF7FFFFF
# BUS_INTERFACE SOPB = d_opb_v20
# PORT Mem_CEN = sram_cen
# PORT Mem_A = sram_addr_full
# PORT Mem_BEN = sram_ben
# PORT Mem_DQ = sram_data
# PORT Mem_OEN = sram_oen_full
# PORT Mem_WEN = sram_wen
# PORT Mem_RPN = sram_rpn
# PORT OPB_Clk = sys_clk
# END
# BEGIN util_reduced_logic
# PARAMETER INSTANCE = oe_adj
# PARAMETER HW_VER = 1.00.a
# PARAMETER C_SIZE = 2
# PARAMETER C_OPERATION = and
# PORT Op1 = sram_oen_full
# PORT Res = sram_oen
# END
# BEGIN util_bus_split
# PARAMETER INSTANCE = addr_adj
# PARAMETER HW_VER = 1.00.a
# PARAMETER C_SIZE_IN = 32
# PARAMETER C_LEFT_POS = 10
# PARAMETER C_SPLIT = 30
# PORT Sig = sram_addr_full
# PORT Out1 = sram_addr
# END
BEGIN opb_uartlite
 PARAMETER INSTANCE = console_uart
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BAUDRATE = 57600
 PARAMETER C_DATA_BITS = 8
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_ODD_PARITY = 0
 PARAMETER C_CLK_FREQ = 40_000_000
 PARAMETER C_BASEADDR = 0xFFFF2000
 PARAMETER C_HIGHADDR = 0xFFFF20FF
 BUS_INTERFACE SOPB = d_opb_v20
 PORT RX = console_uart_rx
 PORT TX = console_uart_tx
 PORT OPB_Clk = sys_clk
 PORT Interrupt = console_uart_interrupt
END

BEGIN opb_intc
 PARAMETER INSTANCE = system_intc
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_BASEADDR = 0xffff3000
 PARAMETER C_HIGHADDR = 0xffff30ff
 BUS_INTERFACE SOPB = d_opb_v20
 PORT OPB_Clk = sys_clk
 PORT Irq = interrupt
 PORT Intr = console_uart_interrupt & timer_interrupt
END

BEGIN opb_timer
 PARAMETER INSTANCE = system_timer
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0xffff1000
 PARAMETER C_HIGHADDR = 0xffff10ff
 BUS_INTERFACE SOPB = d_opb_v20
 PORT OPB_Clk = sys_clk
 PORT Interrupt = timer_interrupt
END

BEGIN opb_gpio
 PARAMETER INSTANCE = system_gpio
 PARAMETER HW_VER = 3.01.a
 PARAMETER C_BASEADDR = 0xffff5000
 PARAMETER C_HIGHADDR = 0xffff51ff
 PARAMETER C_GPIO_WIDTH = 8
 BUS_INTERFACE SOPB = d_opb_v20
 PORT GPIO_IO = gpio
 PORT OPB_Clk = sys_clk
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = d_lmb_bram_if_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00003FFF
 BUS_INTERFACE SLMB = d_lmb_v10
 BUS_INTERFACE BRAM_PORT = conn_0
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = i_lmb_bram_if_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00003FFF
 BUS_INTERFACE SLMB = i_lmb_v10
 BUS_INTERFACE BRAM_PORT = conn_1
END

BEGIN bram_block
 PARAMETER INSTANCE = bram
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_MEMSIZE = 16384
 BUS_INTERFACE PORTA = conn_0
 BUS_INTERFACE PORTB = conn_1
END

BEGIN opb_v20
 PARAMETER INSTANCE = d_opb_v20
 PARAMETER HW_VER = 1.10.b
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT SYS_Rst = sys_rst
 PORT OPB_Clk = sys_clk
END

BEGIN lmb_v10
 PARAMETER INSTANCE = i_lmb_v10
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT SYS_Rst = sys_rst
 PORT LMB_Clk = sys_clk
END

BEGIN lmb_v10
 PARAMETER INSTANCE = d_lmb_v10
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT SYS_Rst = sys_rst
 PORT LMB_Clk = sys_clk
END

BEGIN dcm_module
 PARAMETER INSTANCE = system_dcm
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_CLK0_BUF = TRUE
 PARAMETER C_CLKFX_BUF = TRUE
 PARAMETER C_CLKIN_PERIOD = 10.000000
 PARAMETER C_CLKFX_DIVIDE = 3
 PARAMETER C_CLKFX_MULTIPLY = 2
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT RST = net_gnd
 PORT CLKFB = sys_clk_fb
 PORT CLK0 = sys_clk_fb
 PORT CLKFX = sys_clkfx
 PORT CLKIN = sys_clk
 PORT LOCKED = system_dcm_LOCKED
END

BEGIN dcm_module
 PARAMETER INSTANCE = pshift_dcm
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_CLKIN_PERIOD = 15.000000
 PARAMETER C_EXT_RESET_HIGH = 0
 PARAMETER C_CLK0_BUF = TRUE
 PARAMETER C_CLK90_BUF = TRUE
 PORT LOCKED = pshift_dcm_LOCKED
 PORT CLKFB = pshiftdcm_fb
 PORT CLK0 = pshiftdcm_fb
 PORT RST = system_dcm_LOCKED
 PORT CLKIN = sys_clk
 PORT CLK90 = clk_90
END

BEGIN opb_sdram
 PARAMETER INSTANCE = ddr_controller
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_BASEADDR = 0x80000000
 PARAMETER C_HIGHADDR = 0x807FFFFF
 PARAMETER C_INCLUDE_BURST_SUPPORT = 0
 PARAMETER C_SDRAM_AWIDTH = 12
 PARAMETER C_SDRAM_BANK_AWIDTH = 2
 PARAMETER C_SDRAM_TRAS = 37000
 PARAMETER C_SDRAM_TRC = 63000
 PARAMETER C_SDRAM_TRCD = 15000
 PARAMETER C_SDRAM_TRRD = 14000
 PARAMETER C_SDRAM_TRP = 15000
 PARAMETER C_OPB_CLK_PERIOD_PS = 25000
 PARAMETER C_SDRAM_COL_AWIDTH = 8
 BUS_INTERFACE SOPB = d_opb_v20
 PORT OPB_Clk = sys_clk
 PORT SDRAM_Clk_in = sys_clk
 PORT SDRAM_Clk = sdram_clk
 PORT SDRAM_CKE = sdram_cke
 PORT SDRAM_CSn = sdram_cs_N
 PORT SDRAM_RASn = sdram_ras_N
 PORT SDRAM_CASn = sdram_cas_N
 PORT SDRAM_WEn = sdram_we_N
 PORT SDRAM_DQM = sdram_dqm
 PORT SDRAM_BankAddr = sdram_ba
 PORT SDRAM_Addr = sdram_addr
 PORT SDRAM_DQ = sdram_dq
END

Follow-Ups:
- Re: [microblaze-uclinux] Booting uClinux
  - From: Tyrone Kwok

References:
- [microblaze-uclinux] Booting uClinux
  - From: John McGrath
- Re: [microblaze-uclinux] Booting uClinux
  - From: John McGrath

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