[microblaze-uclinux] mixed EDK and ISE projects

[John Williams <jwilliams@xxxxxxxxxxxxxx>]

Hi everyone,

Previously I've worked mostly with EDK generating and synthesising the 
top level designs, but am now looking into the combined EDK+ISE flow. 
This is primarily for integrating custom cores that do not wrap nicely 
within the EDK pcores structure.

I used EDK to create my main MicroBlaze system, with the "heirarchy and 
flow" project options identifying it as a submodule, and to use the ISE 
flow.  This created a couple of VHDL files and a ProjNav project:

* system.vhd - the microblaze system wrapper

* system-stub.vhd - a true toplevel vhdl file, which instantiates the 
microblaze subsystem

* The ISE project file defaults to using the system-stub as the top level.

Two facts (or observations at least):

1. These files are overwritten each time you run "tools->export to 
ProjNav" from XPS.

2. The purpose of using ISE for toplevel synthesis implies that wou will 
be modifying the system-stub.vhd and ProjNav project file, ven if only 
trivially.

These two facts suggest that the export EDK project to ProjNav is really 
a one-way process.   If you make any change to the EDK projec, 
re-exporting will cause any changes at the top level (system-stub.vhd) 
to be lost.  Also last are any changes to the actual ProjNav project.

Once you add the UCF and ELF files into the ISE project (as per Xilinx 
documentation), they too will be lost after running the "export to 
ProjNav" in XPS.

What is the recommended approach here if you want to develop both the 
toplevel (ISE) design as well as the EDK project?  Copy/rename the 
system-stub.vhd and projnav files, then just cut and paste any changes 
which are subsequently exported from XPS?

Any suggestions or clarifications would be greatly appreciated.

Thanks,

John
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