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Re: [microblaze-uclinux] Re: Microblaze using uclinux

we r using EDK6.3 with sp2 and ISE6.3.
we had developed a h/w with microblze and uart. on memec v2p -fg456
demo board. please find the attached mhs and mss files.

-Anuroop

On 6/2/05, wouter@itee.uq.edu.au <wouter@itee.uq.edu.au> wrote:
> What kind of hardware and software are you actually using for this, ISE/EDK
> version ?
> 
> > HI
> > I have followed the following procedure as per williams to generate
> > autoconfig.in.
> > 1)Downloaded  auto uclinux version from the site.
> > 2) copied BSP directory to our hardware project directory (directory
> > name is with new platform name.)
> > 3)Ran 'make libs' from bsp/uclinux/src/microblaze/
> > 4)Then it could compile successfully but found no autoconfig.in file there.,
> > What went wrong  ?
> > What  am I missing ..?
> > It would be great if someone can help me on this.
> > Looking fwd for a quick reply from the group.
> >
> 
> Wouter
> ___________________________
> microblaze-uclinux mailing list
> microblaze-uclinux@itee.uq.edu.au
> Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
> Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/
> 
>

# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 6.3 Build EDK_Gmm.12.3
# Fri May 27 10:58:11 2005
# Target Board:  Memec Design Virtex-II Pro P4-fg456 Development Board with P160 Comm Module Rev 4
# Family:	 virtex2p
# Device:	 XC2VP4
# Package:	 FG456
# Speed Grade:	 -6
# Processor: Microblaze
# System clock frequency: 100.000000 MHz
# Debug interface: On-Chip HW Debug Module
# Data Cache: 8 KB
# Instruction Cache: 8 KB
# On Chip Memory :   8 KB
# Total Off Chip Memory :  32 MB
# - SDRAM_8Mx32 =  32 MB
# ##############################################################################


 PARAMETER VERSION = 2.1.0


 PORT fpga_0_RS232_RX_pin = fpga_0_RS232_RX, DIR = INPUT
 PORT fpga_0_RS232_TX_pin = fpga_0_RS232_TX, DIR = OUTPUT
 PORT fpga_0_RS232_req_to_send_pin = net_gnd, DIR = OUTPUT
 PORT fpga_0_LEDs_4Bit_GPIO_d_out_pin = fpga_0_LEDs_4Bit_GPIO_d_out, VEC = [0:3], DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_DQ_pin = fpga_0_SDRAM_8Mx32_SDRAM_DQ, VEC = [0:31], DIR = INOUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_Addr_pin = fpga_0_SDRAM_8Mx32_SDRAM_Addr, VEC = [0:11], DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_DQM_pin = fpga_0_SDRAM_8Mx32_SDRAM_DQM, VEC = [0:3], DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_WEn_pin = fpga_0_SDRAM_8Mx32_SDRAM_WEn, DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_CKE_pin = fpga_0_SDRAM_8Mx32_SDRAM_CKE, DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_CSn_pin = fpga_0_SDRAM_8Mx32_SDRAM_CSn, DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_CASn_pin = fpga_0_SDRAM_8Mx32_SDRAM_CASn, DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_RASn_pin = fpga_0_SDRAM_8Mx32_SDRAM_RASn, DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_Clk_pin = fpga_0_SDRAM_8Mx32_SDRAM_Clk, DIR = OUTPUT
 PORT fpga_0_SDRAM_8Mx32_SDRAM_BankAddr_pin = fpga_0_SDRAM_8Mx32_SDRAM_BankAddr, VEC = [0:1], DIR = OUTPUT
 PORT sys_clk_pin = sys_clk_s, DIR = INPUT, SIGIS = CLK
 PORT sys_rst_pin = sys_rst_s, DIR = INPUT


BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER HW_VER = 3.00.a
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER C_NUMBER_OF_PC_BRK = 2
 PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 1
 PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 1
 PARAMETER C_USE_ICACHE = 1
 PARAMETER C_CACHE_BYTE_SIZE = 8192
 PARAMETER C_USE_DCACHE = 1
 PARAMETER C_DCACHE_BYTE_SIZE = 8192
 PARAMETER C_ICACHE_BASEADDR = 0x82000000
 PARAMETER C_ICACHE_HIGHADDR = 0x83ffffff
 PARAMETER C_ADDR_TAG_BITS = 12
 PARAMETER C_DCACHE_BASEADDR = 0x82000000
 PARAMETER C_DCACHE_HIGHADDR = 0x83ffffff
 PARAMETER C_DCACHE_ADDR_TAG = 12
 BUS_INTERFACE DOPB = mb_opb
 BUS_INTERFACE IOPB = mb_opb
 BUS_INTERFACE DLMB = dlmb
 BUS_INTERFACE ILMB = ilmb
 PORT CLK = sys_clk_s
 PORT DBG_CAPTURE = DBG_CAPTURE_s
 PORT DBG_CLK = DBG_CLK_s
 PORT DBG_REG_EN = DBG_REG_EN_s
 PORT DBG_TDI = DBG_TDI_s
 PORT DBG_TDO = DBG_TDO_s
 PORT DBG_UPDATE = DBG_UPDATE_s
 PORT Interrupt = Interrupt
END

BEGIN opb_v20
 PARAMETER INSTANCE = mb_opb
 PARAMETER HW_VER = 1.10.c
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT SYS_Rst = sys_rst_s
 PORT OPB_Clk = sys_clk_s
END

BEGIN opb_mdm
 PARAMETER INSTANCE = debug_module
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_MB_DBG_PORTS = 1
 PARAMETER C_USE_UART = 1
 PARAMETER C_UART_WIDTH = 8
 PARAMETER C_BASEADDR = 0xFFFFC000
 PARAMETER C_HIGHADDR = 0xffffc0ff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT DBG_CAPTURE_0 = DBG_CAPTURE_s
 PORT DBG_CLK_0 = DBG_CLK_s
 PORT DBG_REG_EN_0 = DBG_REG_EN_s
 PORT DBG_TDI_0 = DBG_TDI_s
 PORT DBG_TDO_0 = DBG_TDO_s
 PORT DBG_UPDATE_0 = DBG_UPDATE_s
END

BEGIN lmb_v10
 PARAMETER INSTANCE = ilmb
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT SYS_Rst = sys_rst_s
 PORT LMB_Clk = sys_clk_s
END

BEGIN lmb_v10
 PARAMETER INSTANCE = dlmb
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT SYS_Rst = sys_rst_s
 PORT LMB_Clk = sys_clk_s
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = dlmb_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00001fff
 BUS_INTERFACE SLMB = dlmb
 BUS_INTERFACE BRAM_PORT = dlmb_port
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = ilmb_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00001fff
 BUS_INTERFACE SLMB = ilmb
 BUS_INTERFACE BRAM_PORT = ilmb_port
END

BEGIN bram_block
 PARAMETER INSTANCE = lmb_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = ilmb_port
 BUS_INTERFACE PORTB = dlmb_port
END

BEGIN opb_uartlite
 PARAMETER INSTANCE = RS232
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BAUDRATE = 57600
 PARAMETER C_DATA_BITS = 8
 PARAMETER C_ODD_PARITY = 0
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_CLK_FREQ = 100000000
 PARAMETER C_BASEADDR = 0xffff2000
 PARAMETER C_HIGHADDR = 0xffff20ff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT Interrupt = RS232_Interrupt
 PORT RX = fpga_0_RS232_RX
 PORT TX = fpga_0_RS232_TX
END

BEGIN opb_gpio
 PARAMETER INSTANCE = LEDs_4Bit
 PARAMETER HW_VER = 3.01.b
 PARAMETER C_GPIO_WIDTH = 4
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_IS_BIDIR = 0
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_BASEADDR = 0xFFFF5000
 PARAMETER C_HIGHADDR = 0xffff51ff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT GPIO_d_out = fpga_0_LEDs_4Bit_GPIO_d_out
END

BEGIN opb_sdram
 PARAMETER INSTANCE = SDRAM_8Mx32
 PARAMETER HW_VER = 1.00.e
 PARAMETER C_INCLUDE_HIGHSPEED_PIPE = 0
 PARAMETER C_OPB_CLK_PERIOD_PS = 10000
 PARAMETER C_SDRAM_TCCD = 1
 PARAMETER C_SDRAM_TRAS = 48000
 PARAMETER C_SDRAM_TRC = 70000
 PARAMETER C_SDRAM_TRFC = 75000
 PARAMETER C_SDRAM_TRCD = 19000
 PARAMETER C_SDRAM_TRRD = 16000
 PARAMETER C_SDRAM_TRP = 19000
 PARAMETER C_SDRAM_TREF = 64
 PARAMETER C_SDRAM_CAS_LAT = 2
 PARAMETER C_SDRAM_COL_AWIDTH = 9
 PARAMETER C_SDRAM_BANK_AWIDTH = 2
 PARAMETER C_SDRAM_AWIDTH = 12
 PARAMETER C_SDRAM_DWIDTH = 32
 PARAMETER C_BASEADDR = 0x80000000
 PARAMETER C_HIGHADDR = 0x81ffffff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT SDRAM_CLK_in = sys_clk_s
 PORT SDRAM_DQ = fpga_0_SDRAM_8Mx32_SDRAM_DQ
 PORT SDRAM_Addr = fpga_0_SDRAM_8Mx32_SDRAM_Addr
 PORT SDRAM_DQM = fpga_0_SDRAM_8Mx32_SDRAM_DQM
 PORT SDRAM_WEn = fpga_0_SDRAM_8Mx32_SDRAM_WEn
 PORT SDRAM_CKE = fpga_0_SDRAM_8Mx32_SDRAM_CKE
 PORT SDRAM_CSn = fpga_0_SDRAM_8Mx32_SDRAM_CSn
 PORT SDRAM_CASn = fpga_0_SDRAM_8Mx32_SDRAM_CASn
 PORT SDRAM_RASn = fpga_0_SDRAM_8Mx32_SDRAM_RASn
 PORT SDRAM_Clk = fpga_0_SDRAM_8Mx32_SDRAM_Clk
 PORT SDRAM_BankAddr = fpga_0_SDRAM_8Mx32_SDRAM_BankAddr
END

BEGIN opb_intc
 PARAMETER INSTANCE = opb_intc_0
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_BASEADDR = 0xffff3000
 PARAMETER C_HIGHADDR = 0xffff30ff
 BUS_INTERFACE SOPB = mb_opb
 PORT Irq = Interrupt
 PORT Intr = timer_interrupt & RS232_Interrupt 
END

BEGIN opb_timer
 PARAMETER INSTANCE = opb_timer_0
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0xffff1000
 PARAMETER C_HIGHADDR = 0xffff10ff
 BUS_INTERFACE SOPB = mb_opb
 PORT Interrupt = timer_interrupt
END



 PARAMETER VERSION = 2.2.0


BEGIN OS
 PARAMETER OS_NAME = uclinux
 PARAMETER OS_VER = 1.00.a
 PARAMETER PROC_INSTANCE = microblaze_0
 PARAMETER MAIN_MEMORY = sdram
 PARAMETER LMB_MEMORY = ilmb_cntlr
 PARAMETER STDIN = RS232
 PARAMETER STDOUT = RS232
END


BEGIN PROCESSOR
 PARAMETER DRIVER_NAME = cpu
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = microblaze_0
 PARAMETER COMPILER = mb-gcc
 PARAMETER ARCHIVER = mb-ar
 PARAMETER XMDSTUB_PERIPHERAL = debug_module
END


BEGIN DRIVER
 PARAMETER DRIVER_NAME = opbarb
 PARAMETER DRIVER_VER = 1.02.a
 PARAMETER HW_INSTANCE = mb_opb
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = uartlite
 PARAMETER DRIVER_VER = 1.00.b
 PARAMETER HW_INSTANCE = debug_module
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = bram
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = dlmb_cntlr
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = bram
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = ilmb_cntlr
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = uartlite
 PARAMETER DRIVER_VER = 1.00.b
 PARAMETER HW_INSTANCE = RS232
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = gpio
 PARAMETER DRIVER_VER = 2.00.a
 PARAMETER HW_INSTANCE = LEDs_4Bit
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = sdram
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = SDRAM_8Mx32
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = intc
 PARAMETER DRIVER_VER = 1.00.c
 PARAMETER HW_INSTANCE = opb_intc_0
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = tmrctr
 PARAMETER DRIVER_VER = 1.00.b
 PARAMETER HW_INSTANCE = opb_timer_0
END