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[microblaze-uclinux] (The files) Microblaze Interrupt registers

To: microblaze-uclinux@xxxxxxxxxxxxxx
Subject: [microblaze-uclinux] (The files) Microblaze Interrupt registers
From: alucero@xxxxxxxxx
Date: Thu, 16 Jun 2005 13:16:47 +0200
Reply-to: microblaze-uclinux@xxxxxxxxxxxxxx
Sender: owner-microblaze-uclinux@xxxxxxxxxxxxxx
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-- 
Alejandro Lucero
OS3, OS Serveis i Solucions
www.os3sl.com
Ingeniería Informática
+34 665687168
Av.Benjamin Franklin
CEEI. Parque Tecnológico de Paterna
Valencia(Spain)

# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 7.1 Build EDK_H.10.4
# Thu Jun  9 12:44:58 2005
# Target Board:  Custom
# Family:	 spartan3
# Device:	 xc3s2000
# Package:	 fg676
# Speed Grade:	 -5
# Processor: Microblaze
# System clock frequency: 75.000000 MHz
# Debug interface: XMD Debug with Stub
# On Chip Memory :  16 KB
# Total Off Chip Memory :  34 MB
# - Generic_External_Memory =   2 MB
# - Generic_DDR =  32 MB
# ##############################################################################


 PARAMETER VERSION = 2.1.0


 PORT fpga_0_RS232_req_to_send_pin = net_gnd, DIR = OUT
 PORT fpga_0_RS232_RX_pin = fpga_0_RS232_RX, DIR = IN
 PORT fpga_0_RS232_TX_pin = fpga_0_RS232_TX, DIR = OUT
 PORT fpga_0_Generic_External_Memory_Mem_DQ_pin = fpga_0_Generic_External_Memory_Mem_DQ, DIR = INOUT, VEC = [0:31]
 PORT fpga_0_Generic_External_Memory_Mem_A_pin = fpga_0_Generic_External_Memory_Mem_A, DIR = OUT, VEC = [0:31]
 PORT fpga_0_Generic_External_Memory_Mem_BEN_pin = fpga_0_Generic_External_Memory_Mem_BEN, DIR = OUT, VEC = [0:3]
 PORT fpga_0_Generic_External_Memory_Mem_WEN_pin = fpga_0_Generic_External_Memory_Mem_WEN, DIR = OUT
 PORT fpga_0_Generic_External_Memory_Mem_OEN_pin = fpga_0_Generic_External_Memory_Mem_OEN, DIR = OUT, VEC = [0:0]
 PORT fpga_0_Generic_External_Memory_Mem_CEN_pin = fpga_0_Generic_External_Memory_Mem_CEN, DIR = OUT, VEC = [0:0]
 PORT fpga_0_Generic_External_Memory_flash_csn_dummy_pin = net_vcc, DIR = OUT
 PORT fpga_0_Generic_External_Memory_Mem_RPN_pin = fpga_0_Generic_External_Memory_Mem_RPN, DIR = OUT
 PORT fpga_0_Generic_DDR_DDR_DQ_pin = fpga_0_Generic_DDR_DDR_DQ, DIR = INOUT, VEC = [0:15]
 PORT fpga_0_Generic_DDR_DDR_Addr_pin = fpga_0_Generic_DDR_DDR_Addr, DIR = OUT, VEC = [0:12]
 PORT fpga_0_Generic_DDR_DDR_BankAddr_pin = fpga_0_Generic_DDR_DDR_BankAddr, DIR = OUT, VEC = [0:1]
 PORT fpga_0_Generic_DDR_DDR_CASn_pin = fpga_0_Generic_DDR_DDR_CASn, DIR = OUT
 PORT fpga_0_Generic_DDR_DDR_CKE_pin = fpga_0_Generic_DDR_DDR_CKE, DIR = OUT
 PORT fpga_0_Generic_DDR_DDR_CSn_pin = fpga_0_Generic_DDR_DDR_CSn, DIR = OUT
 PORT fpga_0_Generic_DDR_DDR_RASn_pin = fpga_0_Generic_DDR_DDR_RASn, DIR = OUT
 PORT fpga_0_Generic_DDR_DDR_WEn_pin = fpga_0_Generic_DDR_DDR_WEn, DIR = OUT
 PORT fpga_0_Generic_DDR_DDR_DM_pin = fpga_0_Generic_DDR_DDR_DM, DIR = OUT, VEC = [0:1]
 PORT fpga_0_Generic_DDR_DDR_DQS_pin = fpga_0_Generic_DDR_DDR_DQS, DIR = INOUT, VEC = [0:1]
 PORT fpga_0_Generic_DDR_DDR_Clk_pin = fpga_0_Generic_DDR_DDR_Clk, DIR = OUT
 PORT fpga_0_Generic_DDR_DDR_Clkn_pin = fpga_0_Generic_DDR_DDR_Clkn, DIR = OUT
 PORT sys_clk_pin = dcm_clk_s, DIR = IN
 PORT sys_rst_pin = sys_rst_pin, DIR = IN


BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER HW_VER = 4.00.a
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER C_NUMBER_OF_PC_BRK = 1
 PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 0
 PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 0
 PARAMETER C_USE_BARREL = 1
 PARAMETER C_USE_DIV = 1
 PARAMETER C_USE_MSR_INSTR = 1
 PARAMETER C_DIV_ZERO_EXCEPTION = 1
 PARAMETER C_USE_PCMP_INSTR = 1
 BUS_INTERFACE SFSL0 = download_link
 BUS_INTERFACE DLMB = dlmb
 BUS_INTERFACE ILMB = ilmb
 BUS_INTERFACE DOPB = mb_opb
 BUS_INTERFACE IOPB = mb_opb
 PORT CLK = sys_clk_s
 PORT Interrupt = Interrupt
END

BEGIN opb_v20
 PARAMETER INSTANCE = mb_opb
 PARAMETER HW_VER = 1.10.c
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT SYS_Rst = sys_rst_s
 PORT OPB_Clk = sys_clk_s
END

BEGIN fsl_v20
 PARAMETER INSTANCE = download_link
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT SYS_Rst = sys_rst_s
 PORT FSL_Clk = sys_clk_s
END

BEGIN opb_mdm
 PARAMETER INSTANCE = debug_module
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_MB_DBG_PORTS = 1
 PARAMETER C_UART_WIDTH = 8
 PARAMETER C_WRITE_FSL_PORTS = 1
 PARAMETER C_BASEADDR = 0x41400000
 PARAMETER C_HIGHADDR = 0x4140ffff
 BUS_INTERFACE MFSL0 = download_link
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
END

BEGIN lmb_v10
 PARAMETER INSTANCE = ilmb
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT SYS_Rst = sys_rst_s
 PORT LMB_Clk = sys_clk_s
END

BEGIN lmb_v10
 PARAMETER INSTANCE = dlmb
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT SYS_Rst = sys_rst_s
 PORT LMB_Clk = sys_clk_s
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = dlmb_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x22000000
 PARAMETER C_HIGHADDR = 0x22001fff
 BUS_INTERFACE SLMB = dlmb
 BUS_INTERFACE BRAM_PORT = dlmb_port
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = ilmb_cntlr
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0x22000000
 PARAMETER C_HIGHADDR = 0x22001fff
 BUS_INTERFACE SLMB = ilmb
 BUS_INTERFACE BRAM_PORT = ilmb_port
END

BEGIN bram_block
 PARAMETER INSTANCE = lmb_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = ilmb_port
 BUS_INTERFACE PORTB = dlmb_port
END

BEGIN opb_emc
 PARAMETER INSTANCE = Generic_External_Memory
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 1
 PARAMETER C_MAX_MEM_WIDTH = 32
 PARAMETER C_MEM0_WIDTH = 32
 PARAMETER C_SYNCH_MEM_0 = 0
 PARAMETER C_OPB_CLK_PERIOD_PS = 13333
 PARAMETER C_NUM_BANKS_MEM = 1
 PARAMETER C_TCEDV_PS_MEM_0 = 15000
 PARAMETER C_TWC_PS_MEM_0 = 15000
 PARAMETER C_TAVDV_PS_MEM_0 = 15000
 PARAMETER C_TWP_PS_MEM_0 = 12000
 PARAMETER C_THZCE_PS_MEM_0 = 7000
 PARAMETER C_TLZWE_PS_MEM_0 = 0
 PARAMETER C_MEM0_BASEADDR = 0x01200000
 PARAMETER C_MEM0_HIGHADDR = 0x013fffff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT Mem_DQ = fpga_0_Generic_External_Memory_Mem_DQ
 PORT Mem_A = fpga_0_Generic_External_Memory_Mem_A
 PORT Mem_BEN = fpga_0_Generic_External_Memory_Mem_BEN
 PORT Mem_WEN = fpga_0_Generic_External_Memory_Mem_WEN
 PORT Mem_OEN = fpga_0_Generic_External_Memory_Mem_OEN
 PORT Mem_CEN = fpga_0_Generic_External_Memory_Mem_CEN
 PORT Mem_RPN = fpga_0_Generic_External_Memory_Mem_RPN
END

BEGIN opb_ddr
 PARAMETER INSTANCE = Generic_DDR
 PARAMETER HW_VER = 1.10.a
 PARAMETER C_DDR_AWIDTH = 13
 PARAMETER C_DDR_BANK_AWIDTH = 2
 PARAMETER C_DDR_COL_AWIDTH = 9
 PARAMETER C_DDR_DWIDTH = 16
 PARAMETER C_INCLUDE_BURST_SUPPORT = 0
 PARAMETER C_REG_DIMM = 0
 PARAMETER C_OPB_CLK_PERIOD_PS = 13333
 PARAMETER C_NUM_BANKS_MEM = 1
 PARAMETER C_NUM_CLK_PAIRS = 1
 PARAMETER C_DDR_TMRD = 15000
 PARAMETER C_DDR_TWR = 15000
 PARAMETER C_DDR_TRAS = 40000
 PARAMETER C_DDR_TRC = 65000
 PARAMETER C_DDR_TRFC = 75000
 PARAMETER C_DDR_TRCD = 20000
 PARAMETER C_DDR_TRRD = 15000
 PARAMETER C_DDR_TRP = 20000
 PARAMETER C_DDR_TREFC = 70000000
 PARAMETER C_MEM0_BASEADDR = 0x80000000
 PARAMETER C_MEM0_HIGHADDR = 0x81ffffff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT DDR_DQ = fpga_0_Generic_DDR_DDR_DQ
 PORT DDR_Addr = fpga_0_Generic_DDR_DDR_Addr
 PORT DDR_BankAddr = fpga_0_Generic_DDR_DDR_BankAddr
 PORT DDR_CASn = fpga_0_Generic_DDR_DDR_CASn
 PORT DDR_CKE = fpga_0_Generic_DDR_DDR_CKE
 PORT DDR_CSn = fpga_0_Generic_DDR_DDR_CSn
 PORT DDR_RASn = fpga_0_Generic_DDR_DDR_RASn
 PORT DDR_WEn = fpga_0_Generic_DDR_DDR_WEn
 PORT DDR_DM = fpga_0_Generic_DDR_DDR_DM
 PORT DDR_DQS = fpga_0_Generic_DDR_DDR_DQS
 PORT DDR_Clk = fpga_0_Generic_DDR_DDR_Clk
 PORT DDR_Clkn = fpga_0_Generic_DDR_DDR_Clkn
 PORT Clk90_in = clk_90_s
 PORT Clk90_in_n = clk_90_n_s
 PORT OPB_Clk_n = sys_clk_n_s
 PORT DDR_Clk90_in = ddr_clk_90_s
 PORT DDR_Clk90_in_n = ddr_clk_90_n_s
END

BEGIN opb_uartlite
 PARAMETER INSTANCE = RS232
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BAUDRATE = 57600
 PARAMETER C_DATA_BITS = 8
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_CLK_FREQ = 75000000
 PARAMETER C_BASEADDR = 0x40600000
 PARAMETER C_HIGHADDR = 0x4060ffff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT Interrupt = RS232_Interrupt
 PORT RX = fpga_0_RS232_RX
 PORT TX = fpga_0_RS232_TX
END

BEGIN opb_bram_if_cntlr
 PARAMETER INSTANCE = opb_bram_if_cntlr_1
 PARAMETER HW_VER = 1.00.a
 PARAMETER c_opb_clk_period_ps = 13333
 PARAMETER c_baseaddr = 0x00000000
 PARAMETER c_highaddr = 0x00001fff
 BUS_INTERFACE SOPB = mb_opb
 BUS_INTERFACE PORTA = opb_bram_if_cntlr_1_port
 PORT OPB_Clk = sys_clk_s
END

BEGIN bram_block
 PARAMETER INSTANCE = opb_bram_if_cntlr_1_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = opb_bram_if_cntlr_1_port
END

BEGIN opb_timer
 PARAMETER INSTANCE = opb_timer_1
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_COUNT_WIDTH = 32
 PARAMETER C_ONE_TIMER_ONLY = 0
 PARAMETER C_BASEADDR = 0x41c00000
 PARAMETER C_HIGHADDR = 0x41c0ffff
 BUS_INTERFACE SOPB = mb_opb
 PORT OPB_Clk = sys_clk_s
 PORT Interrupt = opb_timer_1_Interrupt
END

BEGIN opb_intc
 PARAMETER INSTANCE = opb_intc_0
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_BASEADDR = 0x41200000
 PARAMETER C_HIGHADDR = 0x4120ffff
 PARAMETER C_HAS_CIE = 1
 PARAMETER C_HAS_SIE = 1
 BUS_INTERFACE SOPB = mb_opb
 # Added by Alex Lucero 15-6-05
 PORT OPB_Clk = sys_clk_s
 PORT Irq = Interrupt
 PORT Intr = RS232_Interrupt & opb_timer_1_Interrupt
END

BEGIN dcm_module
 PARAMETER INSTANCE = dcm_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_CLK0_BUF = FALSE
 PARAMETER C_CLKFX_BUF = TRUE
 PARAMETER C_CLKFX_DIVIDE = 4
 PARAMETER C_CLKFX_MULTIPLY = 3
 PARAMETER C_CLKIN_PERIOD = 10.000000
 PARAMETER C_CLK_FEEDBACK = 1X
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT CLKIN = dcm_clk_s
 PORT CLKFX = divided_clock
 PORT CLK0 = dcm_0_FB
 PORT CLKFB = dcm_0_FB
 PORT RST = sys_rst_pin
 PORT LOCKED = dcm_0_lock
END

BEGIN dcm_module
 PARAMETER INSTANCE = dcm_1
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_CLK0_BUF = TRUE
 PARAMETER C_CLK270_BUF = FALSE
 PARAMETER C_CLK90_BUF = TRUE
 PARAMETER C_CLKIN_PERIOD = 13.333333
 PARAMETER C_CLK_FEEDBACK = 1X
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT CLKIN = divided_clock
 PORT CLK90 = clk_90_s
 PORT CLK0 = sys_clk_s
 PORT CLKFB = sys_clk_s
 PORT RST = dcm_0_lock
 PORT LOCKED = dcm_1_lock
END

BEGIN dcm_module
 PARAMETER INSTANCE = dcm_2
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_CLK0_BUF = FALSE
 PARAMETER C_CLK270_BUF = FALSE
 PARAMETER C_CLK90_BUF = TRUE
 PARAMETER C_CLKIN_PERIOD = 13.333333
 PARAMETER C_CLK_FEEDBACK = 1X
 PARAMETER C_EXT_RESET_HIGH = 0
 PORT CLKIN = clk_90_s
 PORT CLK90 = ddr_clk_90_s
 PORT CLK0 = dcm_2_FB
 PORT CLKFB = dcm_2_FB
 PORT RST = dcm_1_lock
 PORT LOCKED = dcm_2_lock
END

BEGIN util_logic_gate
 PARAMETER INSTANCE = my_logic_inverter_sys_clk_n
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_VECTOR_WIDTH = 1
 PARAMETER C_LOGIC_AND = false
 PARAMETER C_LOGIC_OR = false
 PARAMETER C_LOGIC_INV = true
 PORT ina = sys_clk_s
 PORT outc = sys_clk_n_s
END

BEGIN util_logic_gate
 PARAMETER INSTANCE = my_logic_inverter_clk90_n
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_VECTOR_WIDTH = 1
 PARAMETER C_LOGIC_AND = false
 PARAMETER C_LOGIC_OR = false
 PARAMETER C_LOGIC_INV = true
 PORT ina = clk_90_s
 PORT outc = clk_90_n_s
END

BEGIN util_logic_gate
 PARAMETER INSTANCE = my_logic_inverter_ddrclk90_n
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_VECTOR_WIDTH = 1
 PARAMETER C_LOGIC_AND = false
 PARAMETER C_LOGIC_OR = false
 PARAMETER C_LOGIC_INV = true
 PORT ina = ddr_clk_90_s
 PORT outc = ddr_clk_90_n_s
END

BEGIN util_logic_gate
 PARAMETER INSTANCE = dcm_1_lock_not
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_VECTOR_WIDTH = 1
 PARAMETER C_LOGIC_AND = false
 PARAMETER C_LOGIC_OR = false
 PARAMETER C_LOGIC_INV = true
 PORT ina = dcm_1_lock
 PORT outc = sys_rst_s
END


 PARAMETER VERSION = 2.2.0


BEGIN OS
 PARAMETER OS_NAME = uclinux
 PARAMETER OS_VER = 1.00.a
 PARAMETER PROC_INSTANCE = microblaze_0
 PARAMETER MAIN_MEMORY = Generic_DDR
 PARAMETER MAIN_MEMORY_BANK = 0
 PARAMETER LMB_MEMORY = ilmb_cntlr
 PARAMETER STDIN = RS232
 PARAMETER STDOUT = RS232
END


# PARAMETER_TARGET_DIR = /home/UCLINUX/uClinux-dist/uClinux-dist/linux-2.4.x/arch/microblaze/platform/uclinux-auto
BEGIN PROCESSOR
 PARAMETER DRIVER_NAME = cpu
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = microblaze_0
 PARAMETER COMPILER = mb-gcc
 PARAMETER ARCHIVER = mb-ar
 PARAMETER XMDSTUB_PERIPHERAL = debug_module
END


BEGIN DRIVER
 PARAMETER DRIVER_NAME = opbarb
 PARAMETER DRIVER_VER = 1.02.a
 PARAMETER HW_INSTANCE = mb_opb
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = uartlite
 PARAMETER DRIVER_VER = 1.00.b
 PARAMETER HW_INSTANCE = debug_module
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = bram
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = dlmb_cntlr
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = bram
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = ilmb_cntlr
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = emc
 PARAMETER DRIVER_VER = 2.00.a
 PARAMETER HW_INSTANCE = Generic_External_Memory
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = ddr
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = Generic_DDR
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = uartlite
 PARAMETER DRIVER_VER = 1.00.b
 PARAMETER HW_INSTANCE = RS232
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = bram
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = opb_bram_if_cntlr_1
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = tmrctr
 PARAMETER DRIVER_VER = 1.00.b
 PARAMETER HW_INSTANCE = opb_timer_1
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = intc
 PARAMETER DRIVER_VER = 1.00.c
 PARAMETER HW_INSTANCE = opb_intc_0
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = generic
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = dcm_0
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = generic
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = dcm_1
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = generic
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = dcm_2
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = generic
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = my_logic_inverter_sys_clk_n
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = generic
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = my_logic_inverter_clk90_n
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = generic
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = my_logic_inverter_ddrclk90_n
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = generic
 PARAMETER DRIVER_VER = 1.00.a
 PARAMETER HW_INSTANCE = dcm_1_lock_not
END

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