[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [microblaze-uclinux] Avnet XCS2000 S3 boot complete
Hi Errol, John,
Errol, Why do you suspect about the hardware multiplier?
John, what do you mean with "sounds familiar" about the interrupt problem?
My experience with msrclr and msrset with MB 4.0 was it seems something is not
working in the design. When I check "msrclr rd, 0x0" with xmd all is fine, in
rd is stored MSR and the MSR is not changed. However when I check "msrclr rd,
0x2" used to disable interrupts, the rd is written with 0x0, so when you try
to enable interrupts with the rd contents nothing happen.
I must say I'm working without msrclr in MB3.0, but just because I'm facing
with ethernet configuration at this time. When I have a moment I'll check it
to discard a problem with my design/configuration.
On Tuesday 28 June 2005 10:54, Errol Terblanche wrote:
> Hi everybody,
>
> Ok, there is in fact something strange with MB 4.00. But I don't know yet
> if it is the hardware multiplier or MB itself.
>
> I have confirmed that the 32KB cache problem does go away just by switching
> my design back to MB 3.00, without even recompiling the kernel.
>
> Also, although I got MB 4.00 to boot up(by removing the 32KB cache), it was
> unable to mount root while the same image runs AND mounts root just fine on
> MB 3.00. I don't know yet what MB 4.00 does wrong in the mount phase.
>
> John, you tested MB 4.00. Are you sure that you downloaded the MB 4.00 FPGA
> config to the board? It seems that the version in /proc/cpuinfo gets
> compiled in and doesn't represent the actual running MB version. Only
> reason why I'm asking is that I have gotten confused with my board a few
> times, although I am a bit of a scatter brain...
>
> I can't believe how easy it is to get uClinux up and running on the MB
> 3.00. I thought all the trouble I've been having the last month and a half
> was my fault... :-)
>
> Thanx,
> Errol
>
>
> -----Original Message-----
> From: owner-microblaze-uclinux@itee.uq.edu.au
> [mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of John Williams
> Sent: Tuesday, June 28, 2005 2:01 AM
> To: microblaze-uclinux@itee.uq.edu.au
> Subject: Re: [microblaze-uclinux] Avnet XCS2000 S3 boot complete
>
> Hi Errol, Alejandro,
>
> Errol Terblanche wrote:
> > I have yet to confirm if this is a problem on my side, or in MB 4.00. For
> > some reason it tries to create a 4GB cache instead of the 32KB, all other
> > caches creates fine...
>
> Hmm that's pretty strange... I'm seeing some problems trying to get the
> EDK7.1 gcc-3.4.x compiler to build kernels - and have seen issues that
> sound a bit like this.
>
> Alejandro's points about the interrupt behaviour are also sounding
> familiar. I am trying to get some time to sit and work through this,
> but I'm really happy that you guys are looking into it - please keep
> reporting your findings here!
>
> Thanks,
>
> John
> ___________________________
> microblaze-uclinux mailing list
> microblaze-uclinux@itee.uq.edu.au
> Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
> Mailing List Archive :
> http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/
>
>
> ___________________________
> microblaze-uclinux mailing list
> microblaze-uclinux@itee.uq.edu.au
> Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
> Mailing List Archive :
> http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/
--
Alejandro Lucero
OS3, OS Serveis i Solucions
www.os3sl.com
Ingeniería Informática
+34 665687168
Av.Benjamin Franklin
CEEI. Parque Tecnológico de Paterna
Valencia(Spain)
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@itee.uq.edu.au
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/