RE: [microblaze-uclinux] CFI Flash on 8bit bus?

["David Banas" <dbanas@xxxxxxxxxxxxxx>]

Sorry about that, Greg.

David Banas
Field Applications Engineer
Nu Horizons Electronics Corp.
2070 Ringwood Avenue
San Jose, CA 95131
(408)434-0800 - office
(415)846-5837 - cell
http://www.nuhorizons.com
> -----Original Message-----
> From: owner-microblaze-uclinux@itee.uq.edu.au [mailto:owner-microblaze-
> uclinux@itee.uq.edu.au] On Behalf Of Steve Sanders
> Sent: Tuesday, July 05, 2005 3:37 PM
> To: microblaze-uclinux@itee.uq.edu.au
> Subject: RE: [microblaze-uclinux] CFI Flash on 8bit bus?
>
> Actually...  Greg made the EMC core changes to accomodate 16-bit wide
> flash.  I just convinced him that it needed to be done.  :-)  The
> changes can be found in the Avnet LX25 design the MicroBlaze uClinux
> Project Home Page:
>
> http://www.itee.uq.edu.au/~jwilliams/mblaze-
> uclinux/Downloads/platforms.html
>
> Steve
>
> --- David Banas <dbanas@nuhorizons.com> wrote:
>
> > Hi Erol,
> >
> > Those of us using 16-bit wide FLASH have had to use some
> > modifications to
> > the actual HDL code for the EMC core. These mods were originally
> > written by
> > Steve Sanders. I wonder if you're in the same boat and might need to
> > follow
> > Steve's example, in order to make the EMC core compatible with your
> > FLASH.
> >
> > David Banas
> > Field Applications Engineer
> > Nu Horizons Electronics Corp.
> > 2070 Ringwood Avenue
> > San Jose, CA 95131
> > (408)434-0800 - office
> > (415)846-5837 - cell
> > http://www.nuhorizons.com
> >
> > > -----Original Message-----
> > > From: owner-microblaze-uclinux@itee.uq.edu.au
> > [mailto:owner-microblaze-
> > > uclinux@itee.uq.edu.au] On Behalf Of Errol Terblanche
> > > Sent: Friday, July 01, 2005 12:42 AM
> > > To: microblaze-uclinux@itee.uq.edu.au
> > > Subject: [microblaze-uclinux] CFI Flash on 8bit bus?
> > >
> > > Hi everyone,
> > >
> > > I have been struggling with flash for the last few days, and I'm at
> > my
> > > wit's
> > > end.
> > >
> > > I have configured mtd to use Intel flash and to use 8bit bus width.
> > >
> > > During boot I get the following message:
> > >
> > > [snip]
> > > physmap flash device: 1000000 at 24000000
> > > cfi_cmdset_0001: Erase suspend on write enabled
> > > 0: offset=0x0,size=0x20000,blocks=128
> > > Using buffer write method
> > > physmap: no partition info available, registering whole flash at
> > once
> > > [snip]
> > >
> > > That tells me that it did detect the chip, as its block size is
> > > 0x20000(128KB) and it has 128 blocks for a total of 16MB.
> > >
> > > But when I try and format(or dd) it I get the following:
> > >
> > > [snip]
> > > # ftl_format /dev/mtd0
> > > Partition size = 16 mb, erase unit size = 128 kb, 1 transfer units
> > > Reserved
> > > 5%, formatted size = 15631872 bytes Erasing all blocks...
> > > Chip reports improper command sequence: status 0x7000000000
> > >
> > > block erase failed: Input/output error
> > > format failed.
> > > [snip]
> > >
> > > The only thing that I can think of is that mtd is accessing it as
> > > something
> > > other than 8 bit mode thus sending erroneous blank commands during
> > the
> > > erase
> > > command sequence. And why is 0x7000000000 a 40 bit number?
> > >
> > > Thanx,
> > > Errol
> > >
> > >
> > > ___________________________
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> > http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
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> > http://www.itee.uq.edu.au/~listarch/microblaze-
> > > uclinux/
> > >
> > >
> > >
> >
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