[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [microblaze-uclinux] Microblaze Performance.
Tyrone,
Yea, at first I hadnt noticed that, but then i found it and it increased
my performance about 10 fold. The necissary lines were in the tranciever.c
file I sent. Even still it is ungodly slow.
Any ideas where that jumper is?
Thanks,
Andy
>From: Tyrone Kwok <tokwok@gmail.com>
>Reply-To: microblaze-uclinux@itee.uq.edu.au
>To: microblaze-uclinux@itee.uq.edu.au
>Subject: Re: [microblaze-uclinux] Microblaze Performance.
>Date: Thu, 15 Sep 2005 02:11:43 +0800
>
>Hi,
> I would like to ask if you have enabled the data/instruction cache in the
>program?
> Cheers,
>Tyrone
>
> On 9/14/05, Abot Botbot <dejanigma@hotmail.com> wrote:
> >
> > Hey Folks,
> >
> > This is my first post so try not to let my inexperience offend. My
> > question relates to the hardware options one uses in setting up the
> > microblaze. With EDK and BSB I quickly got a microblaze working. With
>some
> > finagling and an XMD stub I got large, complicated programs running out
>of
> > the external SDRAM (im using the Digilent S3 starter board, or an
> > equivalent). But I see a major problem with the performance. Here are
>the
> > numbers and comparissons I am using: The code runs a 64-point FFT on an
> > array of data with real and imaginary parts. It is a lot of calculation,
> > so
> > it is easy to time. I run 1000 of these in a loop and it takes
> > approximately
> > 4 minutes, an unfathomably long amount of time in the world of DSP. The
> > comparison is vs a Motorola DSP board which is also doing emulated
> > floating
> > point arithmetic, which performs 1000 FFTs in under a second. My theory
>at
> > this point is that I am missing a major design flaw which is inhibiting
>my
> > performance. Technically, the microblaze has a core clock of 100 MHz as
> > well
> > as the SDRAM. They are interfaced using the Cache-Link FSL bus and a
>BRAM
> > cache local to the microblaze. With these statistics, there is no real
> > reason for it to behave so poorly. Even adding a hardware FPU doesn't
> > change
> > the result in the least.
> > Here is what I would like, if anyone would be so kind: A basic rundown
>of
> > the hardware configuration options necissary to optomize microblaze
> > performance for running from external memory. There must be a way to
>make
> > the microblaze run in an equivalent way to this outdated 1998 Motorola
> > 24-bit DSP chip. If not then Xilinx and IBM have a lot of explaining to
> > do.
> > For refference I will supply the relevant design files I have available.
> >
> > Thanks So Much,
> > Andy
> >
> > _________________________________________________________________
> > Don't just search. Find. Check out the new MSN Search!
> > http://search.msn.click-url.com/go/onm00200636ave/direct/01/
> >
> >
> >
_________________________________________________________________
Express yourself instantly with MSN Messenger! Download today - it's FREE!
http://messenger.msn.click-url.com/go/onm00200471ave/direct/01/
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@itee.uq.edu.au
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/