RE: [microblaze-uclinux] error when compile

The memory test works. I’ve seen that pass on hyperterminal. I’ve followed the uclinux microblaze design document with changes only to the cache setup because my Spartan can only have 2Kb of icache and 8 Kb of dcache. The only other changes I made was not to use the interrupt port on page 18. I’ll go back and turn that on. Also, I changed C_EXT_Reset to be high. Also, the other change I made was change the processor clock frequency to 50 ohms instead of 66.7 after I experienced problems. Other than not using the flash when I made the builds that is the only thing that I have changed. I’ll use BSB to see if I get a better result.

From: owner-microblaze-uclinux@itee.uq.edu.au [mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of Jason Wu
Sent: Monday, October 10, 2005 7:45 AM
To: microblaze-uclinux@itee.uq.edu.au
Subject: Re: [microblaze-uclinux] error when compile

Hi Eric

I think you should better use BSB to create your platform. This will avoid alot problems. Make sure the memory test is ok

Just carefully follow the uClinux_ready_MicroBlaze_design document to create your microblaze platform.
Please also read "Platform Studio User Guide" and "Embedded System Tools Reference Manual"

Regards,

Jason

Eric Lynum wrote:

Ok so I mapped the icache and dcache to 0x80000000 which is the same for my sram and the kernel still won’t boot. Very frustrating. I’ve again enclosed my auto-config and mhs and mss files. This is the error I’m getting when I do

dow boot.elf where I initialize the cache and

dow –data image.bin 0x80000000

I get MicroBlaze Pipeline stalled executing instruction at >> PC; 0x8000000c

Try resetting the processor tocontinue

From: owner-microblaze-uclinux@itee.uq.edu.au [mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of Eric Lynum
Sent: Sunday, October 09, 2005 12:46 PM
To: microblaze-uclinux@itee.uq.edu.au
Subject: RE: [microblaze-uclinux] error when compile

Ok, you’re right Jason, I looked in EDK and I didn’t have the icache or dcache boxes checked for the sram so I should get them mapped. Here’s my question I had EDK generate the address and now everything is at 20400000 is that going to cause a problem. Do I need the sram address to be at 0x80000000. I noticed Emile didn’t have his at 0x80000000 and oh by the way sorry Emile on the gender assumption.

From: owner-microblaze-uclinux@itee.uq.edu.au [mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of Eric Lynum
Sent: Sunday, October 09, 2005 10:25 AM
To: microblaze-uclinux@itee.uq.edu.au
Subject: RE: [microblaze-uclinux] error when compile

Yes I manually changed the sram address to 80000000 in EDK. So should I change the D/I cache to be 80000000 also is what you are saying right? Here’s my question must the SRAM address be 80000000 or can it be anything but it has to have at least a 4MB range right?

From: owner-microblaze-uclinux@itee.uq.edu.au [mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of Jason Wu
Sent: Sunday, October 09, 2005 9:39 AM
To: microblaze-uclinux@itee.uq.edu.au
Subject: Re: [microblaze-uclinux] error when compile

Hi Eric

I just check up your mhs file, there is one thing, i don't really get how it works.
The mhs shows the I/D cache address from 0x20100000 to 0x201FFFFF and there is no device that mapped to 0x20100000 to 0x201FFFFF. This is why you getting pipeline stalled error.

Normally D/I cache should map to memory device. The only memory device is SRAM_256Kx32 and mapped to 0x80000000 to 0x0803FFFFF. Did you manually SRAM_256Kx32's address in the mhs file? or this is generated by edk bsb?

I think it will be a good idea that you recreate your hardware platform and kernel image, both auto-config.in and mhs shows wrong mapping address for I/D cache.

Regards,

Jason

Eric Lynum wrote:

Hi John thanks,

I haven't done the cvs update yet but I took the image files that were

created and I'm still having problems getting the kernel to boot.  I've

enclosed my auto-config file which I have used to make the kernel now and

now after running dow -data image5.bin 0x80000000 and con 0x80000000, I get

this error Microblaze pipeline stalled executing instruction at >> PC:

0x80000000c. Try resetting the processor to continue.  I tried to follow

Emile's document on changing the testmem.c file and changing the microblaze

version from 4 to 3.00. Should I do that or is that unneeded.

-----Original Message-----

From: owner-microblaze-uclinux@itee.uq.edu.au

[mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of John Williams

Sent: Saturday, October 08, 2005 11:41 PM

To: microblaze-uclinux@itee.uq.edu.au

Subject: Re: [microblaze-uclinux] error when compile

Hi Eric,

Eric Lynum wrote:

I have no idea why this happened but I commented out in mmap.c under the

mmnomu directory this section calling for a romptr and I was able to build

the image.bin and elf files.  Any ideas on what this code was doing?

OK, so this one's beyond your control :)  There's been some work going

on in the MM part of the CVS lately, looks like microblaze got affected.

Change to uClinux-2.4.x/arch/microblaze/platforms and do

$ cvs update Rules.make

That will pick up a one-liner fix that I just committed to CVS, and you

should be back in business.

Regards,

John

___________________________

microblaze-uclinux mailing list

microblaze-uclinux@itee.uq.edu.au

Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux

Mailing List Archive :

http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/