Thanks Jason!!!! That was it! I should
have paid more attention. Lakshmi, check out your xbd board file and put in the
dummy signals because it is just like Jason said.
Jason, appreciate all your help!!!!
From: owner-microblaze-uclinux@itee.uq.edu.au [mailto:owner-microblaze-uclinux@itee.uq.edu.au]
On Behalf Of Jason Wu
Sent: Monday, October 17, 2005
1:19 AM
To:
microblaze-uclinux@itee.uq.edu.au
Subject: Re: [microblaze-uclinux]
sram failure
hi Eric
Is there any minimum frequency requirement for the DDR SRAM you are using? for
example, the ml401's DDR SRAM requires minimum frequency of 66.66MHz to operate
properly.
I also found something in the Xbd
file
ATTRIBUTE ALERT = 'This design has
several unused pins which are tied to VREF. We must prevent the FPGA from
driving our unused VREF pins. Failure to do so will result in VREF not =
1.25V and DDR will Fail. Please see the 'unused_vref_readme.txt' in your
edk/board/avnet/boards/avnet_v2p7_evl directory.
regards,
Jason
Eric Lynum wrote:
I'm using the Virtex 2 pro evaluation board with 64 MB of DDR SRAM and
Virtex 2 pro P7. I'm using the Base system Builder wizard with the board
file which I downloaded from Avnet. I'll include my mhs and test app files.
Thanks for any help!!
-----Original Message-----
From: owner-microblaze-uclinux@itee.uq.edu.au
[mailto:owner-microblaze-uclinux@itee.uq.edu.au] On Behalf Of John Williams
Sent: Sunday, October 16, 2005 7:52 PM
To: microblaze-uclinux@itee.uq.edu.au
Subject: Re: [microblaze-uclinux] sram failure
Eric Lynum wrote:
I've switched over to a v2 pro eval board with 64M of sdram and now I'm
failing my memory test. All it does is just say
Starting MemoryTest for DDR_SDRAM_1:
Running 32-bit test...
+t just hangs at that point. I'm looking at bad SRAM or something else
that
is missing.
Exactly which board are you using?
What steps did you use to create the hardware system (roll-your-own, or
Base System Builder, or ...)?
John
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