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Re: [microblaze-uclinux] Microblaze 4 still don't work with latest CVS kernel and latest gcc tools



Hi Greg,
I disabled the DATA CACHE in MHS and rebuild all, now the system hangs after the login! ;-( Another strange behavior is the extremely low speed of download of the image.bin file to SDRAM via XMD when using Microblaze4, it takes four times than Microblaze3. I don't
know if the slow download is correlated to the system hangs.

Regards,
Claudio Lanconelli

Greg A Martin wrote:

Claudio,
Just a simple thing to try, Disable the Data cache, either in the code, or
make it 0k in your design, I have seen problems during kernel initialization
with the data  cache on, it seems you can have it on later, but possibly a
problem with cache coherency on the ramdisk image build.  Just a thought.

Greg Martin


-----Original Message-----
From: owner-microblaze-uclinux@xxxxxxxxxxxxxx
[mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx]On Behalf Of Claudio
Lanconelli
Sent: Wednesday, October 19, 2005 7:01 AM
To: microblaze-uclinux@xxxxxxxxxxxxxx
Subject: [microblaze-uclinux] Microblaze 4 still don't work with latest
CVS kernel and latest gcc tools


Hi,
I just updated both CVS kernel and dist and rebuild my system
from scratch with gcc 3.4.1 (latest tool). I use my custom board
with Spartan3 XC3s400. I'm confident the hardware is not the problem
because if I use Microblaze v3 all works fine: boot, login and run my
apps OK.
But if change just the version of the microblaze in my MHS file to use
Microblaze v4 the system resets and hangs during the boot.
Any suggestion?

I attach my MHS and MSS file for detailed system configuration
Here the boot log:

Starting MemoryTest for SDRAM 16M16:
 Running 32-bit test...PASSED!
 Running 16-bit test...PASSED!
 Running 8-bit test...PASSED!
-- Exiting main() --
Linux version 2.4.31-uc0 (lanco@claudio) (gcc version 3.4.1 ( Xilinx EDK
8.1 Build EDK_I.15 290805 )) #125 Wed Oct 19 12:33:35 CEST 2005
On node 0 totalpages: 8192
zone(0): 8192 pages.
zone(1): 0 pages.
zone(2): 0 pages.
CPU: MICROBLAZE
Kernel command line:
Console: xmbserial on UARTLite
Calibrating delay loop... 26.31 BogoMIPS
Memory: 32MB = 32MB total
Memory: 30668KB available (656K code, 1082K data, 40K init)
Dentry cache hash table entries: 4096 (order: 3, 32768 bytes)
Inode cache hash table entries: 2048 (order: 2, 16384 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 8192 (order: 3, 32768 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Microblaze UARTlite serial driver version 1.00
ttyS0 at 0xffff2000 (irq = 1) is a Microblaze UARTlite
ttyS1 at 0x40620000 (irq = 3) is a Microblaze UARTlite
ttyS2 at 0x40600000 (irq = 2) is a Microblaze UARTlite
Starting kswapd
i2c-core.o: i2c core module version 2.6.1 (20010830)
i2c-dev.o: i2c /dev entries driver module version 2.6.1 (20010830)
i2c-core.o: driver i2c-dev dummy driver registered.
i2c-algo-bit.o: i2c bit algorithm module
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
uclinux[mtd]: RAM probe address=0x800d7744 size=0xdc000
uclinux[mtd]: root filesystem index=0
MBOPB scan for NAND...
NAND device: Manufacture ID: 0xec, Chip ID: 0x75 (Samsung NAND 32MB 3,3V)
Using static partition definition
Creating 3 MTD partitions on "NAND 32MB 3,3V":
0x00000000-0x00400000: "MBOPB NandFlash partition 1"
0x00400000-0x00800000: "MBOPB NandFlash partition 2"
0x00800000-0x02000000: "MBOPB NandFlash partition 3"
i2c-microblaze-fslio.c: Xilinx MicroBlaze FSL I/O I2C adapter
i2c-microblaze-fslio.c: HW FSL Ch.1/1 - SCL in:7 out:3, SDA in:6 out:2
i2c-dev.o: Registered 'Microblaze I2C FSL I/O' as minor 0
i2c-core.o: adapter Microblaze I2C FSL I/O registered as adapter 0.
i2c-core.o: driver fm31xx registered.

yaffs: Attempting MTD mount on 31.0, "1f:00"
yaffs: MTD device is not NAND it's type 1
VFS: Mounted root (romfs filesystem) readonly.
Freeing init memory: 40K
-- Entering main() --              <-- the system restart here

Regards,
Claudio Lanconelli

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