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Re: [microblaze-uclinux] Microblaze 4 still don't work with latest CVS kernel and latest gcc tools
Hi Greg,
I already have set up the download FSL connection (look at the attached
xmd.log), I use
the parallel IV cable in compatibility mode since I never got the
xp4drvr driver work
with Linux 2.6 of my Suse 9.1 (but this is another story).
However the exact same configuration with Microblaze 3 takes 1min 10sec
to download 1.6 MByte, while Microblaze 4 takes 4 min 23 sec!!
With Microblaze 3 the system never hangs.
The only changes to MHS file are the version of Microblaze and the
PARAMETER C_USE_DCACHE = 0 (look at the attached system.mhs and
_config_mb4).
I don't know if I need to change other parameters to disable data cache.
After that I rebuild all the hardware (after a make clean) and rebuild
the kernel:
make oldconfig
make clean
make dep
make
Doing so the system hangs (no more reset) after few seconds or minutes
after login. The hangs seems random. With DATA CACHE enabled the system
reset and hangs during the boot process.
I will revert to Microblaze 3 at the moment, but if you have other
suggestions I'll can do other tests.
Thank you for the interest,
Claudio Lanconelli
Greg A Martin wrote:
Claudio,
I was seeing something similar on the download until I added an FSL bus to
the debugger.
I am using a USB cable and download a 2Mbyte kernel and ramdisk image in
about 20 sec.
I added an fsl bus (fsl_v20_v2_00_a) to the design and connected the
microblaze's sfsl0 bus as a slave and the debug module mfsl0 bus as the
master. This might help your download speeds.
Is any parameters or options for data cache still present in the design and
did you re-build the kernel with the new auto-config file. I have noticed
erratic behavior if all traces of an option aren't removed and the kernel
isn't re-built from a clean node.
Greg
# ##############################################################################
# Target Board: S163-0
# Family: spartan3
# Device: XC3S400
# Package: PQ208
# Speed Grade: -4
# Processor: Microblaze
# Debug interface: On-Chip HW Debug Module
# On Chip Memory : 2 KB
# Off Chip Memory :
# - SDRAM_16Mx16 = 32 MB
# - NAND Flash = 32 MB
# ##############################################################################
# Parameters
PARAMETER VERSION = 2.1.0
PORT sys_rst_pin = ext_rst, DIR = IN
PORT vfast_clk_pin = vfast_clk_pin, DIR = IN
PORT opbsdram_clkfb = opbsdram_clkfb, DIR = IN
PORT opbsdram_ck = opbsdram_clk, DIR = OUT
PORT opbsdram_cke = opbsdram_cke, DIR = OUT
PORT opbsdram_cs = opbsdram_cs, DIR = OUT
PORT opbsdram_ras = opbsdram_ras, DIR = OUT
PORT opbsdram_cas = opbsdram_cas, DIR = OUT
PORT opbsdram_we = opbsdram_we, DIR = OUT
PORT opbsdram_dqm = opbsdram_dqm, VEC = [0:1], DIR = OUT
PORT opbsdram_baddr = opbsdram_baddr, VEC = [0:1], DIR = OUT
PORT opbsdram_addr = opbsdram_addr, VEC = [0:12], DIR = OUT
PORT opbsdram_dq = opbsdram_dq, VEC = [0:15], DIR = INOUT
PORT console_uart_RX_pin = console_uart_rx, DIR = IN
PORT console_uart_TX_pin = console_uart_tx, DIR = OUT
PORT pwm_audio_right_pin = pwm_audio, DIR = OUT
PORT video_sdram_clkfb = vidsdram_clkfb, DIR = IN
PORT video_sdram_ck = video_sdram_ck, DIR = OUT
PORT video_sdram_data = video_sdram_data, VEC = [15:0], DIR = INOUT
PORT video_sdram_addr = video_sdram_addr, VEC = [12:0], DIR = OUT
PORT video_sdram_bank_addr = video_sdram_bank_addr, VEC = [1:0], DIR = OUT
PORT video_sdram_ras = video_sdram_ras, DIR = OUT
PORT video_sdram_cas = video_sdram_cas, DIR = OUT
PORT video_sdram_we = video_sdram_we, DIR = OUT
PORT video_sdram_dqm = video_sdram_dqm, VEC = [1:0], DIR = OUT
PORT video_sdram_cs = video_sdram_cs, DIR = OUT
PORT video_sdram_cke = video_sdram_cke, DIR = OUT
PORT video_Red = video_Red, VEC = [4:0], DIR = OUT
PORT video_Green = video_Green, VEC = [4:0], DIR = OUT
PORT video_Blue = video_Blue, VEC = [4:0], DIR = OUT
PORT video_HSync = video_HSync, DIR = OUT
PORT video_VSync = video_VSync, DIR = OUT
PORT cctalk_uart_RX_pin = cctalk_uart_RX_inv, DIR = IN
PORT cctalk_uart_TX_pin = cctalk_uart_TX, DIR = OUT
PORT prot_uart_RX_pin = prot_uart_RX, DIR = IN
PORT prot_uart_TX_pin = prot_uart_TX, DIR = OUT
PORT nandflash_SBSY = nandflash_SBSY, DIR = IN
PORT nandflash_SCE0 = nandflash_SCE, DIR = OUT
PORT nandflash_SWP = nandflash_SWP, DIR = OUT
PORT nandflash_SCLE = nandflash_SCLE, DIR = OUT
PORT nandflash_SALE = nandflash_SALE, DIR = OUT
PORT nandflash_SWE = nandflash_SWE, DIR = OUT
PORT nandflash_SRE = nandflash_SRE, DIR = OUT
PORT nandflash_SDATA = nandflash_SDATA, VEC = [7:0], DIR = INOUT
PORT prg_init_pin = prg_INIT, DIR = OUT
PORT prg_cclk_pin = prg_CCLK, DIR = OUT
PORT prg_din_pin = prg_DIN, DIR = IN
PORT i2c_scl_pin = i2c_scl, DIR = INOUT
PORT i2c_sda_pin = i2c_sda, DIR = INOUT
PORT audio_mute_pin = audio_mute, DIR = OUT
## PORT audio_mute_pin = net_gnd, DIR = OUT
PORT powerfail_int_pin = powerfail_int, DIR = IN
PORT ioexp_int_pin = ioexp_int, DIR = IN
PORT detect_12_24_pin = detect_12_24, DIR = IN
# END XAPP482 -- Signals needed for PROM readback
# Sub Components
BEGIN microblaze
PARAMETER INSTANCE = microblaze_0
PARAMETER HW_VER = 4.00.a
PARAMETER C_USE_BARREL = 1
PARAMETER C_USE_DIV = 1
PARAMETER C_USE_MSR_INSTR = 1
PARAMETER C_DEBUG_ENABLED = 1
PARAMETER C_NUMBER_OF_PC_BRK = 2
PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 1
PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 1
PARAMETER C_USE_ICACHE = 1
PARAMETER C_ICACHE_BASEADDR = 0x80000000
PARAMETER C_ICACHE_HIGHADDR = 0x81ffffff
PARAMETER C_CACHE_BYTE_SIZE = 4096
PARAMETER C_ADDR_TAG_BITS = 13
PARAMETER C_USE_DCACHE = 0
PARAMETER C_DCACHE_BASEADDR = 0x80000000
PARAMETER C_DCACHE_HIGHADDR = 0x81ffffff
PARAMETER C_DCACHE_BYTE_SIZE = 4096
PARAMETER C_DCACHE_ADDR_TAG = 13
PARAMETER C_FSL_LINKS = 4
BUS_INTERFACE MFSL0 = fslink_audio
BUS_INTERFACE SFSL0 = download_link
BUS_INTERFACE MFSL1 = iolink_2
BUS_INTERFACE SFSL1 = iolink_1
BUS_INTERFACE MFSL2 = vidlink_2
BUS_INTERFACE SFSL2 = vidlink_1
BUS_INTERFACE MFSL3 = vidlink_reg
# # BUS_INTERFACE DLMB = dlmb
# # BUS_INTERFACE ILMB = ilmb
BUS_INTERFACE DOPB = mb_opb
BUS_INTERFACE IOPB = mb_opb
PORT CLK = sys_clk
PORT INTERRUPT = interrupt
END
BEGIN opb_mdm
PARAMETER INSTANCE = debug_module
PARAMETER HW_VER = 2.00.a
PARAMETER C_MB_DBG_PORTS = 1
PARAMETER C_USE_UART = 0
PARAMETER C_UART_WIDTH = 8
PARAMETER C_WRITE_FSL_PORTS = 1
PARAMETER C_BASEADDR = 0xFFFFC000
PARAMETER C_HIGHADDR = 0xFFFFC0FF
BUS_INTERFACE MFSL0 = download_link
BUS_INTERFACE SOPB = mb_opb
PORT OPB_Clk = sys_clk
END
BEGIN fsl_v20
PARAMETER INSTANCE = download_link
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PORT SYS_Rst = sys_rst
PORT FSL_Clk = sys_clk
END
BEGIN opb_uartlite
PARAMETER INSTANCE = console_uart
PARAMETER HW_VER = 1.00.b
PARAMETER C_BAUDRATE = 115200
PARAMETER C_DATA_BITS = 8
PARAMETER C_USE_PARITY = 0
PARAMETER C_ODD_PARITY = 0
PARAMETER C_CLK_FREQ = 53_333_333
PARAMETER C_BASEADDR = 0xFFFF2000
PARAMETER C_HIGHADDR = 0xFFFF20FF
BUS_INTERFACE SOPB = mb_opb
PORT Interrupt = console_uart_interrupt
PORT OPB_Clk = sys_clk
PORT RX = console_uart_rx
PORT TX = console_uart_tx
END
BEGIN opb_intc
PARAMETER INSTANCE = system_intc
PARAMETER HW_VER = 1.00.c
PARAMETER C_BASEADDR = 0xffff3000
PARAMETER C_HIGHADDR = 0xffff30ff
PARAMETER C_HAS_IPR = 0
PARAMETER C_HAS_SIE = 1
PARAMETER C_HAS_CIE = 1
PARAMETER C_HAS_IVR = 1
BUS_INTERFACE SOPB = mb_opb
PORT Irq = interrupt
PORT OPB_Clk = sys_clk
PORT Intr = cctalk_uart_Interrupt & prot_uart_Interrupt & console_uart_interrupt & timer_interrupt
END
BEGIN opb_timer
PARAMETER INSTANCE = system_timer
PARAMETER HW_VER = 1.00.b
PARAMETER C_BASEADDR = 0xffff1000
PARAMETER C_HIGHADDR = 0xffff10ff
PARAMETER C_ONE_TIMER_ONLY = 1
BUS_INTERFACE SOPB = mb_opb
PORT OPB_Clk = sys_clk
PORT Interrupt = timer_interrupt
END
# #BEGIN lmb_v10
# # PARAMETER INSTANCE = ilmb
# # PARAMETER HW_VER = 1.00.a
# # PARAMETER C_EXT_RESET_HIGH = 0
# # PORT LMB_Clk = sys_clk
# # PORT SYS_Rst = sys_rst
# #END
# #
# #BEGIN lmb_v10
# # PARAMETER INSTANCE = dlmb
# # PARAMETER HW_VER = 1.00.a
# # PARAMETER C_EXT_RESET_HIGH = 0
# # PORT LMB_Clk = sys_clk
# # PORT SYS_Rst = sys_rst
# #END
# #
# #BEGIN lmb_bram_if_cntlr
# # PARAMETER INSTANCE = dlmb_cntlr
# # PARAMETER HW_VER = 1.00.b
# # PARAMETER C_BASEADDR = 0x00000000
# # PARAMETER C_HIGHADDR = 0x00001fff
# # BUS_INTERFACE SLMB = dlmb
# # BUS_INTERFACE BRAM_PORT = conn_0
# #END
# #
# #BEGIN lmb_bram_if_cntlr
# # PARAMETER INSTANCE = ilmb_cntlr
# # PARAMETER HW_VER = 1.00.b
# # PARAMETER C_BASEADDR = 0x00000000
# # PARAMETER C_HIGHADDR = 0x00001fff
# # BUS_INTERFACE SLMB = ilmb
# # BUS_INTERFACE BRAM_PORT = conn_1
# #END
BEGIN bram_block
PARAMETER INSTANCE = bram
PARAMETER HW_VER = 1.00.a
BUS_INTERFACE PORTA = conn_0
END
# # BUS_INTERFACE PORTB = conn_1
BEGIN opb_bram_if_cntlr
PARAMETER INSTANCE = opb_bram_ictrl
PARAMETER HW_VER = 1.00.b
PARAMETER c_baseaddr = 0x00000000
PARAMETER c_highaddr = 0x000007ff
PARAMETER c_opb_clk_period_ps = 18750
BUS_INTERFACE SOPB = mb_opb
BUS_INTERFACE PORTA = conn_0
END
BEGIN opb_v20
PARAMETER INSTANCE = mb_opb
PARAMETER HW_VER = 1.10.c
PARAMETER C_EXT_RESET_HIGH = 0
PORT OPB_Clk = sys_clk
PORT SYS_Rst = sys_rst
END
BEGIN opb_sdram
PARAMETER INSTANCE = sdram_controller
PARAMETER HW_VER = 1.00.e
PARAMETER C_OPB_CLK_PERIOD_PS = 18750
PARAMETER C_INCLUDE_BURST_SUPPORT = 0
PARAMETER C_INCLUDE_HIGHSPEED_PIPE = 1
PARAMETER C_SDRAM_BANK_AWIDTH = 2
PARAMETER C_SDRAM_AWIDTH = 13
PARAMETER C_SDRAM_COL_AWIDTH = 9
PARAMETER C_SDRAM_TRAS = 45000
PARAMETER C_SDRAM_DWIDTH = 16
PARAMETER C_SDRAM_TRC = 66000
PARAMETER C_BASEADDR = 0x80000000
PARAMETER C_HIGHADDR = 0x81ffffff
BUS_INTERFACE SOPB = mb_opb
PORT OPB_Clk = sys_clk
PORT SDRAM_Clk_in = opbsdram_clk_out
PORT SDRAM_Clk = opbsdram_clk
PORT SDRAM_CKE = opbsdram_cke
PORT SDRAM_CSn = opbsdram_cs
PORT SDRAM_RASn = opbsdram_ras
PORT SDRAM_CASn = opbsdram_cas
PORT SDRAM_WEn = opbsdram_we
PORT SDRAM_DQM = opbsdram_dqm
PORT SDRAM_BankAddr = opbsdram_baddr
PORT SDRAM_Addr = opbsdram_addr
PORT SDRAM_DQ = opbsdram_dq
END
BEGIN dcm_module
PARAMETER INSTANCE = dcm_extfb
PARAMETER HW_VER = 1.00.a
PARAMETER C_CLK_FEEDBACK = 1X
PARAMETER C_CLKIN_PERIOD = 18.75000
PARAMETER C_CLK0_BUF = FALSE
PARAMETER C_CLKFB_BUF = TRUE
PARAMETER C_CLKIN_BUF = FALSE
PORT RST = net_gnd
PORT CLKIN = sys_clk
PORT CLKFB = opbsdram_clkfb
PORT CLK0 = opbsdram_clk_out
PORT LOCKED = sextfb_locked
END
BEGIN dcm_module
PARAMETER INSTANCE = dcm_vintfb
PARAMETER HW_VER = 1.00.a
PARAMETER C_CLK_FEEDBACK = 1X
PARAMETER C_CLK0_BUF = TRUE
PARAMETER C_CLKIN_PERIOD = 12.50000
PARAMETER C_CLKDV_DIVIDE = 1.5
PARAMETER C_CLKDV_BUF = TRUE
PARAMETER C_CLKIN_BUF = TRUE
PORT RST = net_gnd
PORT CLKIN = vfast_clk_pin
PORT CLKFB = vfast_clk
PORT CLK0 = vfast_clk
PORT CLKDV = sys_clk
END
BEGIN dcm_module
PARAMETER INSTANCE = dcm_vextfb
PARAMETER HW_VER = 1.00.a
PARAMETER C_CLK_FEEDBACK = 1X
PARAMETER C_CLKIN_PERIOD = 12.50000
PARAMETER C_CLK0_BUF = FALSE
PARAMETER C_CLKFB_BUF = TRUE
PARAMETER C_CLKIN_BUF = TRUE
PORT RST = net_gnd
PORT CLKIN = vfast_clk_pin
PORT CLKFB = vidsdram_clkfb
PORT CLK0 = vidsdram_clk_out
PORT LOCKED = vextfb_locked
END
BEGIN fsl_v20
PARAMETER INSTANCE = fslink_audio
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PARAMETER C_ASYNC_CLKS = 0
PARAMETER C_IMPL_STYLE = 1
PARAMETER C_USE_CONTROL = 1
PARAMETER C_FSL_DWIDTH = 16
PARAMETER C_FSL_DEPTH = 512
PORT FSL_Clk = sys_clk
PORT SYS_Rst = sys_rst
END
BEGIN fsl_dac
PARAMETER INSTANCE = fsl_dac_audio
PARAMETER HW_VER = 1.01.d
PARAMETER AUDIO_BITS = 16
PARAMETER DIVIDER_SAMPL_FREQ = 2418
BUS_INTERFACE SFSL = fslink_audio
PORT clk = sys_clk
PORT pwm_audio_out = pwm_audio
PORT audio_mute = audio_mute
END
BEGIN fsl_ioctrl
PARAMETER INSTANCE = fsl_ioctrl_0
PARAMETER HW_VER = 1.01.b
PARAMETER FSL_DATA_BITS = 16
PARAMETER INPUT_BITS = 12
PARAMETER OUTPUT_BITS = 8
PARAMETER START_BITS = 1
PARAMETER START_CMD_RISING = 0
BUS_INTERFACE MFSL = iolink_1
BUS_INTERFACE SFSL = iolink_2
PORT clk = vfast_clk
PORT inputs = prg_DIN & powerfail_int & ioexp_int & detect_12_24 & i2c_in_scl & i2c_in_sda & video_status
PORT outputs = fslio_outputs
PORT cmd_end = video_cmd_end
END
BEGIN fsl_v20
PARAMETER INSTANCE = iolink_1
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PARAMETER C_FSL_DWIDTH = 16
PARAMETER C_FSL_DEPTH = 16
PARAMETER C_USE_CONTROL = 0
PARAMETER C_ASYNC_CLKS = 1
PARAMETER C_IMPL_STYLE = 0
PORT SYS_Rst = sys_rst
PORT FSL_M_Clk = vfast_clk
PORT FSL_S_Clk = sys_clk
END
BEGIN fsl_v20
PARAMETER INSTANCE = iolink_2
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PARAMETER C_FSL_DWIDTH = 16
PARAMETER C_FSL_DEPTH = 16
PARAMETER C_USE_CONTROL = 1
PARAMETER C_ASYNC_CLKS = 1
PARAMETER C_IMPL_STYLE = 0
PORT SYS_Rst = sys_rst
PORT FSL_M_Clk = sys_clk
PORT FSL_S_Clk = vfast_clk
END
BEGIN fsl_v20
PARAMETER INSTANCE = vidlink_reg
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PARAMETER C_FSL_DWIDTH = 32
PARAMETER C_FSL_DEPTH = 16
PARAMETER C_USE_CONTROL = 1
PARAMETER C_ASYNC_CLKS = 1
PARAMETER C_IMPL_STYLE = 0
PORT SYS_Rst = sys_rst
PORT FSL_M_Clk = sys_clk
PORT FSL_S_Clk = vfast_clk
END
BEGIN fsl_v20
PARAMETER INSTANCE = vidlink_1
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PARAMETER C_FSL_DWIDTH = 16
PARAMETER C_FSL_DEPTH = 16
PARAMETER C_USE_CONTROL = 0
PARAMETER C_ASYNC_CLKS = 1
PARAMETER C_IMPL_STYLE = 0
PORT SYS_Rst = sys_rst
PORT FSL_M_Clk = vfast_clk
PORT FSL_S_Clk = sys_clk
END
BEGIN fsl_v20
PARAMETER INSTANCE = vidlink_2
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
PARAMETER C_FSL_DWIDTH = 16
PARAMETER C_FSL_DEPTH = 16
PARAMETER C_USE_CONTROL = 0
PARAMETER C_ASYNC_CLKS = 1
PARAMETER C_IMPL_STYLE = 0
PORT SYS_Rst = sys_rst
PORT FSL_M_Clk = sys_clk
PORT FSL_S_Clk = vfast_clk
END
BEGIN lanco_video_ctrl
PARAMETER INSTANCE = fsl_video
PARAMETER HW_VER = 1.01.f
PARAMETER VIDEO_DATA_BITS = 16
PARAMETER REGFSL_DATA_BITS = 32
PARAMETER CLKIN_FREQ = 80000000
PARAMETER VIDEO_MODE = 1
PARAMETER C_RESET_ACTIVE_LEVEL = 1
PARAMETER CAS_LATENCY = 3
PARAMETER VIDEO_CLOCK_DIV = 2
BUS_INTERFACE MFSL0 = vidlink_1
BUS_INTERFACE SFSL0 = vidlink_2
BUS_INTERFACE SFSL1 = vidlink_reg
PORT Clk = vfast_clk
PORT pin_cmd_start = video_cmd_start
PORT pin_cmd_end = video_cmd_end
PORT pin_status = video_status
PORT Video_Red = video_Red
PORT Video_Green = video_Green
PORT Video_Blue = video_Blue
PORT Video_CSync = video_CSync
PORT Video_HSync = video_HSync
PORT Video_VSync = video_VSync
PORT SDRAMClkIn = vidsdram_clk_out
PORT sdram_ck = video_sdram_ck
PORT sdram_data = video_sdram_data
PORT sdram_addr = video_sdram_addr
PORT sdram_bank_addr = video_sdram_bank_addr
PORT sdram_ras = video_sdram_ras
PORT sdram_cas = video_sdram_cas
PORT sdram_we = video_sdram_we
PORT sdram_dqm = video_sdram_dqm
PORT sdram_cs = video_sdram_cs
PORT sdram_cke = video_sdram_cke
PORT int_vsync = fsl_video_int_vsync
PORT int_loadfifo = fsl_video_int_loadfifo
PORT int_copyfifo = fsl_video_int_copyfifo
PORT pin_ena_vidrefresh = video_ena_refresh
END
BEGIN opb_uartlite
PARAMETER INSTANCE = cctalk_uart
PARAMETER HW_VER = 1.00.b
PARAMETER C_BAUDRATE = 9600
PARAMETER C_CLK_FREQ = 53_333_333
PARAMETER C_USE_PARITY = 0
PARAMETER C_ODD_PARITY = 0
PARAMETER C_DATA_BITS = 8
PARAMETER C_BASEADDR = 0x40620000
PARAMETER C_HIGHADDR = 0x4062ffff
BUS_INTERFACE SOPB = mb_opb
PORT OPB_Clk = sys_clk
PORT Interrupt = cctalk_uart_Interrupt
PORT RX = cctalk_uart_RX
PORT TX = cctalk_uart_TX
END
BEGIN opb_uartlite
PARAMETER INSTANCE = prot_uart
PARAMETER HW_VER = 1.00.b
PARAMETER C_CLK_FREQ = 53_333_333
PARAMETER C_BAUDRATE = 19200
PARAMETER C_DATA_BITS = 8
PARAMETER C_USE_PARITY = 0
PARAMETER C_ODD_PARITY = 0
PARAMETER C_BASEADDR = 0x40600000
PARAMETER C_HIGHADDR = 0x4060ffff
BUS_INTERFACE SOPB = mb_opb
PORT OPB_Clk = sys_clk
PORT Interrupt = prot_uart_Interrupt
PORT RX = prot_uart_RX
PORT TX = prot_uart_TX
END
BEGIN util_reduced_logic
PARAMETER INSTANCE = cctalk_invert
PARAMETER HW_VER = 1.00.a
PARAMETER C_OPERATION = xor
PARAMETER C_SIZE = 2
PORT Op1 = cctalk_uart_RX_inv & net_gnd
PORT Res = cctalk_uart_RX
END
BEGIN opb_nandflash
PARAMETER INSTANCE = nandflash
PARAMETER HW_VER = 1.00.a
PARAMETER C_BASEADDR = 0x7d600000
PARAMETER C_HIGHADDR = 0x7d60ffff
BUS_INTERFACE SOPB = mb_opb
PORT OPB_Clk = sys_clk
PORT SBSY = nandflash_SBSY
PORT SCE = nandflash_SCE
PORT SWP = nandflash_SWP
PORT SCLE = nandflash_SCLE
PORT SALE = nandflash_SALE
PORT SWE = nandflash_SWE
PORT SRE = nandflash_SRE
PORT SDATA = nandflash_SDATA
END
BEGIN pin_thristate
PARAMETER INSTANCE = pin_thristate_scl
PORT put_pin = i2c_out_scl
PORT get_pin = i2c_in_scl
PORT bidir_pin = i2c_scl
END
BEGIN pin_thristate
PARAMETER INSTANCE = pin_thristate_sda
PORT put_pin = i2c_out_sda
PORT get_pin = i2c_in_sda
PORT bidir_pin = i2c_sda
END
BEGIN util_bus_split
PARAMETER INSTANCE = util_bus_split_6
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 8
PARAMETER C_SPLIT = 1
PORT Sig = fslio_outputs
PORT Out1 = prg_CE
PORT Out2 = fslio_out5imm
END
BEGIN util_bus_split
PARAMETER INSTANCE = util_bus_split_5
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 7
PARAMETER C_SPLIT = 1
PORT Sig = fslio_out5imm
PORT Out1 = prg_CCLK
PORT Out2 = fslio_out4imm
END
BEGIN util_bus_split
PARAMETER INSTANCE = util_bus_split_4
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 6
PARAMETER C_SPLIT = 1
PORT Sig = fslio_out4imm
PORT Out1 = prg_INIT
PORT Out2 = fslio_out3imm
END
BEGIN util_bus_split
PARAMETER INSTANCE = util_bus_split_3
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 5
PARAMETER C_SPLIT = 1
PORT Sig = fslio_out3imm
PORT Out1 = video_ena_refresh
PORT Out2 = fslio_out2imm
END
BEGIN util_bus_split
PARAMETER INSTANCE = util_bus_split_2
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 4
PARAMETER C_SPLIT = 2
PORT Sig = fslio_out2imm
PORT Out1 = i2c_out_pins
PORT Out2 = video_cmd_start
END
BEGIN util_bus_split
PARAMETER INSTANCE = util_bus_split_1
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 2
PARAMETER C_SPLIT = 1
PORT Sig = i2c_out_pins
PORT Out1 = i2c_out_scl
PORT Out2 = i2c_out_sda
END
BEGIN util_reduced_logic
PARAMETER INSTANCE = util_logic_rstgen
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE = 3
PARAMETER C_OPERATION = and
PORT Op1 = sextfb_locked & vextfb_locked & ext_rst
PORT Res = sys_rst
END
#
# Automatically generated make config: don't edit
#
CONFIG_UCLINUX=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
# CONFIG_ISA is not set
# CONFIG_ISAPNP is not set
# CONFIG_EISA is not set
# CONFIG_MCA is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
# CONFIG_KMOD is not set
CONFIG_MICROBLAZE=y
#
# Processor type and features
#
#
# Platform
#
CONFIG_UCLINUX_AUTO=y
# CONFIG_ML401 is not set
# CONFIG_MBVANILLA is not set
# CONFIG_EGRET01 is not set
# CONFIG_SUZAKU is not set
CONFIG_MODEL_RAM=y
# CONFIG_MODEL_ROM is not set
HZ=100
CONFIG_XILINX_ERAM_START=0x80000000
CONFIG_XILINX_ERAM_SIZE=0x02000000
CONFIG_XILINX_LMB_START=0x00000000
CONFIG_XILINX_LMB_SIZE=0x00000800
CONFIG_XILINX_CPU_CLOCK_FREQ=53333333
CONFIG_XILINX_MICROBLAZE0_INSTANCE="microblaze_0"
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan3"
CONFIG_XILINX_MICROBLAZE0_INSTANCE="microblaze_0"
CONFIG_XILINX_MICROBLAZE0_D_OPB=1
CONFIG_XILINX_MICROBLAZE0_D_LMB=0
CONFIG_XILINX_MICROBLAZE0_I_OPB=1
CONFIG_XILINX_MICROBLAZE0_I_LMB=0
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=0
CONFIG_XILINX_MICROBLAZE0_UNALIGNED_EXCEPTIONS=0
CONFIG_XILINX_MICROBLAZE0_ILL_OPCODE_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_IOPB_BUS_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_DOPB_BUS_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_DIV_ZERO_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_FPU_EXCEPTION=0
CONFIG_XILINX_MICROBLAZE0_DEBUG_ENABLED=1
CONFIG_XILINX_MICROBLAZE0_NUMBER_OF_PBRK=2
CONFIG_XILINX_MICROBLAZE0_NUMBER_OF_RD_ADDR_BRK=1
CONFIG_XILINX_MICROBLAZE0_NUMBER_OF_WR_ADDR_BRK=1
CONFIG_XILINX_MICROBLAZE0_INTERRUPT_IS_EDGE=0
CONFIG_XILINX_MICROBLAZE0_EDGE_IS_POSITIVE=1
CONFIG_XILINX_MICROBLAZE0_FSL_LINKS=4
CONFIG_XILINX_MICROBLAZE0_FSL_DATA_SIZE=32
CONFIG_XILINX_MICROBLAZE0_ICACHE_BASEADDR=0x80000000
CONFIG_XILINX_MICROBLAZE0_ICACHE_HIGHADDR=0x81FFFFFF
CONFIG_XILINX_MICROBLAZE0_USE_ICACHE=1
CONFIG_XILINX_MICROBLAZE0_ALLOW_ICACHE_WR=1
CONFIG_XILINX_MICROBLAZE0_ADDR_TAG_BITS=13
CONFIG_XILINX_MICROBLAZE0_CACHE_BYTE_SIZE=4096
CONFIG_XILINX_MICROBLAZE0_ICACHE_USE_FSL=0
CONFIG_XILINX_MICROBLAZE0_DCACHE_BASEADDR=0x80000000
CONFIG_XILINX_MICROBLAZE0_DCACHE_HIGHADDR=0x81FFFFFF
CONFIG_XILINX_MICROBLAZE0_USE_DCACHE=0
CONFIG_XILINX_MICROBLAZE0_ALLOW_DCACHE_WR=1
CONFIG_XILINX_MICROBLAZE0_DCACHE_ADDR_TAG=0
CONFIG_XILINX_MICROBLAZE0_DCACHE_BYTE_SIZE=4096
CONFIG_XILINX_MICROBLAZE0_DCACHE_USE_FSL=0
CONFIG_XILINX_MICROBLAZE0_INSTANCE="microblaze_0"
CONFIG_XILINX_MICROBLAZE0_HW_VER="4.00.a"
CONFIG_XILINX_MDM_0_INSTANCE="debug_module"
CONFIG_XILINX_MDM_0_BASEADDR=0xFFFFC000
CONFIG_XILINX_MDM_0_HIGHADDR=0xFFFFC0FF
CONFIG_XILINX_MDM_0_OPB_DWIDTH=32
CONFIG_XILINX_MDM_0_OPB_AWIDTH=32
CONFIG_XILINX_MDM_0_FAMILY="spartan3"
CONFIG_XILINX_MDM_0_MB_DBG_PORTS=1
CONFIG_XILINX_MDM_0_USE_UART=0
CONFIG_XILINX_MDM_0_UART_WIDTH=8
CONFIG_XILINX_MDM_0_WRITE_FSL_PORTS=1
CONFIG_XILINX_MDM_0_INSTANCE="debug_module"
CONFIG_XILINX_MDM_0_HW_VER="2.00.a"
CONFIG_XILINX_UARTLITE_0_INSTANCE="console_uart"
CONFIG_XILINX_UARTLITE_0_BASEADDR=0xFFFF2000
CONFIG_XILINX_UARTLITE_0_HIGHADDR=0xFFFF20FF
CONFIG_XILINX_UARTLITE_0_OPB_DWIDTH=32
CONFIG_XILINX_UARTLITE_0_OPB_AWIDTH=32
CONFIG_XILINX_UARTLITE_0_DATA_BITS=8
CONFIG_XILINX_UARTLITE_0_CLK_FREQ=53333333
CONFIG_XILINX_UARTLITE_0_BAUDRATE=115200
CONFIG_XILINX_UARTLITE_0_USE_PARITY=0
CONFIG_XILINX_UARTLITE_0_ODD_PARITY=0
CONFIG_XILINX_UARTLITE_0_INSTANCE="console_uart"
CONFIG_XILINX_UARTLITE_0_HW_VER="1.00.b"
CONFIG_XILINX_UARTLITE_0_IRQ=1
CONFIG_XILINX_UARTLITE_1_INSTANCE="cctalk_uart"
CONFIG_XILINX_UARTLITE_1_BASEADDR=0x40620000
CONFIG_XILINX_UARTLITE_1_HIGHADDR=0x4062FFFF
CONFIG_XILINX_UARTLITE_1_OPB_DWIDTH=32
CONFIG_XILINX_UARTLITE_1_OPB_AWIDTH=32
CONFIG_XILINX_UARTLITE_1_DATA_BITS=8
CONFIG_XILINX_UARTLITE_1_CLK_FREQ=53333333
CONFIG_XILINX_UARTLITE_1_BAUDRATE=9600
CONFIG_XILINX_UARTLITE_1_USE_PARITY=0
CONFIG_XILINX_UARTLITE_1_ODD_PARITY=0
CONFIG_XILINX_UARTLITE_1_INSTANCE="cctalk_uart"
CONFIG_XILINX_UARTLITE_1_HW_VER="1.00.b"
CONFIG_XILINX_UARTLITE_1_IRQ=3
CONFIG_XILINX_UARTLITE_2_INSTANCE="prot_uart"
CONFIG_XILINX_UARTLITE_2_BASEADDR=0x40600000
CONFIG_XILINX_UARTLITE_2_HIGHADDR=0x4060FFFF
CONFIG_XILINX_UARTLITE_2_OPB_DWIDTH=32
CONFIG_XILINX_UARTLITE_2_OPB_AWIDTH=32
CONFIG_XILINX_UARTLITE_2_DATA_BITS=8
CONFIG_XILINX_UARTLITE_2_CLK_FREQ=53333333
CONFIG_XILINX_UARTLITE_2_BAUDRATE=19200
CONFIG_XILINX_UARTLITE_2_USE_PARITY=0
CONFIG_XILINX_UARTLITE_2_ODD_PARITY=0
CONFIG_XILINX_UARTLITE_2_INSTANCE="prot_uart"
CONFIG_XILINX_UARTLITE_2_HW_VER="1.00.b"
CONFIG_XILINX_UARTLITE_2_IRQ=2
CONFIG_XILINX_INTC_0_INSTANCE="system_intc"
CONFIG_XILINX_INTC_0_FAMILY="spartan3"
CONFIG_XILINX_INTC_0_Y=0
CONFIG_XILINX_INTC_0_X=0
CONFIG_XILINX_INTC_0_U_SET="intc"
CONFIG_XILINX_INTC_0_OPB_AWIDTH=32
CONFIG_XILINX_INTC_0_OPB_DWIDTH=32
CONFIG_XILINX_INTC_0_BASEADDR=0xFFFF3000
CONFIG_XILINX_INTC_0_HIGHADDR=0xFFFF30FF
CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS=4
CONFIG_XILINX_INTC_0_KIND_OF_INTR=0x0000000E
CONFIG_XILINX_INTC_0_KIND_OF_EDGE=0x0000000E
CONFIG_XILINX_INTC_0_KIND_OF_LVL=0x00000001
CONFIG_XILINX_INTC_0_HAS_IPR=0
CONFIG_XILINX_INTC_0_HAS_SIE=1
CONFIG_XILINX_INTC_0_HAS_CIE=1
CONFIG_XILINX_INTC_0_HAS_IVR=1
CONFIG_XILINX_INTC_0_IRQ_IS_LEVEL=1
CONFIG_XILINX_INTC_0_IRQ_ACTIVE=1
CONFIG_XILINX_INTC_0_INSTANCE="system_intc"
CONFIG_XILINX_INTC_0_HW_VER="1.00.c"
CONFIG_XILINX_TIMER_0_INSTANCE="system_timer"
CONFIG_XILINX_TIMER_0_FAMILY="spartan3"
CONFIG_XILINX_TIMER_0_COUNT_WIDTH=32
CONFIG_XILINX_TIMER_0_ONE_TIMER_ONLY=1
CONFIG_XILINX_TIMER_0_TRIG0_ASSERT=1
CONFIG_XILINX_TIMER_0_TRIG1_ASSERT=1
CONFIG_XILINX_TIMER_0_GEN0_ASSERT=1
CONFIG_XILINX_TIMER_0_GEN1_ASSERT=1
CONFIG_XILINX_TIMER_0_OPB_AWIDTH=32
CONFIG_XILINX_TIMER_0_OPB_DWIDTH=32
CONFIG_XILINX_TIMER_0_BASEADDR=0xFFFF1000
CONFIG_XILINX_TIMER_0_HIGHADDR=0xFFFF10FF
CONFIG_XILINX_TIMER_0_INSTANCE="system_timer"
CONFIG_XILINX_TIMER_0_HW_VER="1.00.b"
CONFIG_XILINX_TIMER_0_IRQ=0
CONFIG_XILINX_BRAM_IF_CNTLR_0_INSTANCE="opb_bram_ictrl"
CONFIG_XILINX_BRAM_IF_CNTLR_0_BASEADDR=0x00000000
CONFIG_XILINX_BRAM_IF_CNTLR_0_HIGHADDR=0x000007FF
CONFIG_XILINX_BRAM_IF_CNTLR_0_INCLUDE_BURST_SUPPORT=0
CONFIG_XILINX_BRAM_IF_CNTLR_0_OPB_DWIDTH=32
CONFIG_XILINX_BRAM_IF_CNTLR_0_OPB_AWIDTH=32
CONFIG_XILINX_BRAM_IF_CNTLR_0_OPB_CLK_PERIOD_PS=18750
CONFIG_XILINX_BRAM_IF_CNTLR_0_MY_NUM_WRITE_ENABLES=4
CONFIG_XILINX_BRAM_IF_CNTLR_0_MY_NUM_BRAMS=1
CONFIG_XILINX_BRAM_IF_CNTLR_0_INSTANCE="opb_bram_ictrl"
CONFIG_XILINX_BRAM_IF_CNTLR_0_HW_VER="1.00.b"
CONFIG_XILINX_SDRAM_0_INSTANCE="sdram_controller"
CONFIG_XILINX_SDRAM_0_INCLUDE_BURST_SUPPORT=0
CONFIG_XILINX_SDRAM_0_INCLUDE_HIGHSPEED_PIPE=1
CONFIG_XILINX_SDRAM_0_USE_POSEDGE_OUTREGS=0
CONFIG_XILINX_SDRAM_0_FAMILY="spartan3"
CONFIG_XILINX_SDRAM_0_SDRAM_TMRD=2
CONFIG_XILINX_SDRAM_0_SDRAM_TWR=15000
CONFIG_XILINX_SDRAM_0_SDRAM_TCCD=1
CONFIG_XILINX_SDRAM_0_SDRAM_TRAS=45000
CONFIG_XILINX_SDRAM_0_SDRAM_TRC=66000
CONFIG_XILINX_SDRAM_0_SDRAM_TRFC=75000
CONFIG_XILINX_SDRAM_0_SDRAM_TRCD=20000
CONFIG_XILINX_SDRAM_0_SDRAM_TRRD=15000
CONFIG_XILINX_SDRAM_0_SDRAM_TRP=20000
CONFIG_XILINX_SDRAM_0_SDRAM_TREF=64
CONFIG_XILINX_SDRAM_0_SDRAM_REFRESH_NUMROWS=8192
CONFIG_XILINX_SDRAM_0_SDRAM_CAS_LAT=3
CONFIG_XILINX_SDRAM_0_SDRAM_DWIDTH=16
CONFIG_XILINX_SDRAM_0_SDRAM_AWIDTH=13
CONFIG_XILINX_SDRAM_0_SDRAM_COL_AWIDTH=9
CONFIG_XILINX_SDRAM_0_SDRAM_BANK_AWIDTH=2
CONFIG_XILINX_SDRAM_0_SDRAM_TREFI=7812500
CONFIG_XILINX_SDRAM_0_BASEADDR=0x80000000
CONFIG_XILINX_SDRAM_0_HIGHADDR=0x81FFFFFF
CONFIG_XILINX_SDRAM_0_OPB_DWIDTH=32
CONFIG_XILINX_SDRAM_0_OPB_AWIDTH=32
CONFIG_XILINX_SDRAM_0_OPB_CLK_PERIOD_PS=18750
CONFIG_XILINX_SDRAM_0_SIM_INIT_TIME_PS=100000000
CONFIG_XILINX_SDRAM_0_INSTANCE="sdram_controller"
CONFIG_XILINX_SDRAM_0_HW_VER="1.00.e"
CONFIG_XILINX_NANDFLASH_0_INSTANCE="nandflash"
CONFIG_XILINX_NANDFLASH_0_BASEADDR=0x7D600000
CONFIG_XILINX_NANDFLASH_0_HIGHADDR=0x7D60FFFF
CONFIG_XILINX_NANDFLASH_0_OPB_AWIDTH=32
CONFIG_XILINX_NANDFLASH_0_OPB_DWIDTH=32
CONFIG_XILINX_NANDFLASH_0_FAMILY="spartan3"
CONFIG_XILINX_NANDFLASH_0_SM_DWIDTH=8
CONFIG_XILINX_NANDFLASH_0_INSTANCE="nandflash"
CONFIG_XILINX_NANDFLASH_0_HW_VER="1.00.a"
CONFIG_XILINX_FSL_DAC_0_INSTANCE="fsl_dac_audio"
CONFIG_XILINX_FSL_DAC_0_AUDIO_BITS=16
CONFIG_XILINX_FSL_DAC_0_DIVIDER_SAMPL_FREQ=2418
CONFIG_XILINX_FSL_DAC_0_INSTANCE="fsl_dac_audio"
CONFIG_XILINX_FSL_DAC_0_HW_VER="1.01.d"
CONFIG_XILINX_FSL_IOCTRL_0_INSTANCE="fsl_ioctrl_0"
CONFIG_XILINX_FSL_IOCTRL_0_FSL_DATA_BITS=16
CONFIG_XILINX_FSL_IOCTRL_0_OUTPUT_BITS=8
CONFIG_XILINX_FSL_IOCTRL_0_INPUT_BITS=12
CONFIG_XILINX_FSL_IOCTRL_0_START_BITS=1
CONFIG_XILINX_FSL_IOCTRL_0_START_CMD_RISING=0
CONFIG_XILINX_FSL_IOCTRL_0_INSTANCE="fsl_ioctrl_0"
CONFIG_XILINX_FSL_IOCTRL_0_HW_VER="1.01.b"
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_INSTANCE="fsl_video"
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_VIDEO_DATA_BITS=16
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_REGFSL_DATA_BITS=32
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_RED_DABITS=5
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_GREEN_DABITS=5
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_BLUE_DABITS=5
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_ALPHA_DABITS=1
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_ENA_VIDEO_DOUBLESCAN="FALSE"
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_VIDEO_MODE=1
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_BANK_ADDR_BITS=2
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_ROW_ADDR_BITS=13
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_COL_ADDR_BITS=9
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_CAS_LATENCY=3
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_CLKIN_FREQ=80000000
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_VIDEO_CLOCK_DIV=2
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_RESET_ACTIVE_LEVEL=1
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_TRCD=20
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_TRP=20
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_TRAS=44
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_TWR=15
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_TRFC=66
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_INSTANCE="fsl_video"
CONFIG_XILINX_LANCO_VIDEO_CTRL_0_HW_VER="1.01.f"
CONFIG_XILINX_FSL_DAC_NUM_INSTANCES=1
CONFIG_XILINX_FSL_IOCTRL_NUM_INSTANCES=1
CONFIG_XILINX_TIMER_NUM_INSTANCES=1
CONFIG_XILINX_BRAM_IF_CNTLR_NUM_INSTANCES=1
CONFIG_XILINX_INTC_NUM_INSTANCES=1
CONFIG_XILINX_UARTLITE_NUM_INSTANCES=3
CONFIG_XILINX_MDM_NUM_INSTANCES=1
CONFIG_XILINX_LANCO_VIDEO_CTRL_NUM_INSTANCES=1
CONFIG_XILINX_NANDFLASH_NUM_INSTANCES=1
CONFIG_XILINX_SDRAM_NUM_INSTANCES=1
CONFIG_MICROBLAZE_FSL_IOCTRL=y
CONFIG_MB_FSL_IOCTRL_OUT_SLOT_ID=1
CONFIG_MB_FSL_IOCTRL_IN_SLOT_ID=1
# CONFIG_MB_FSL_IOCTRL_RWCHECK_DISABLE is not set
CONFIG_MBVANILLA_CMDLINE=y
CONFIG_ZERO_BSS=y
#
# Debug Logging
#
CONFIG_MICROBLAZE_DEBUGGING=y
#
# General setup
#
# CONFIG_NET is not set
# CONFIG_DISK is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set
# CONFIG_SYSVIPC is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
CONFIG_KCORE_ELF=y
# CONFIG_KCORE_AOUT is not set
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_ZFLAT=y
# CONFIG_CONTIGUOUS_PAGE_ALLOC is not set
# CONFIG_MEM_MAP is not set
# CONFIG_NO_MMU_LARGE_ALLOCS is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_UCBOOTSTRAP_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_JEDECPROBE is not set
# CONFIG_MTD_GEN_PROBE is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_RAM=y
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
# CONFIG_MTD_AMDSTD is not set
# CONFIG_MTD_SHARP is not set
# CONFIG_MTD_JEDEC is not set
# CONFIG_MTD_PSD4256G is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_UCBOOTSTRAP is not set
# CONFIG_MTD_DRAGONIX is not set
# CONFIG_MTD_NETtel is not set
# CONFIG_MTD_SNAPGEODE is not set
# CONFIG_MTD_NETteluC is not set
# CONFIG_MTD_MBVANILLA is not set
# CONFIG_MTD_MB_AUTO is not set
# CONFIG_MTD_ML401 is not set
# CONFIG_MTD_SUZAKU is not set
# CONFIG_MTD_KeyTechnology is not set
# CONFIG_MTD_SED_SIOSIII is not set
CONFIG_MTD_UCLINUX=y
# CONFIG_MTD_PCI is not set
# CONFIG_MTD_PCMCIA is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_MTDCNXT is not set
# CONFIG_MTD_BLKMTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC1000 is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_DOCPROBE is not set
#
# NAND Flash Device Drivers
#
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_VERIFY_WRITE=y
CONFIG_MTD_MBOPBNAND=y
CONFIG_MTD_NAND_IDS=y
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_CISS_SCSI_TAPE is not set
# CONFIG_CISS_MONITOR_THREAD is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_BLK_DEV_RAMDISK_DATA is not set
# CONFIG_BLK_DEV_BLKMEM is not set
# CONFIG_BLK_STATS is not set
#
# Character devices
#
# CONFIG_LEDMAN is not set
# CONFIG_SNAPDOG is not set
# CONFIG_FAST_TIMER is not set
# CONFIG_DS1302 is not set
# CONFIG_M41T11M6 is not set
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
# CONFIG_SERIAL_8250_CONSOLE is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SERIAL_8250_MANY_PORTS is not set
# CONFIG_SERIAL_8250_SHARE_IRQ is not set
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
# CONFIG_SERIAL_8250_MULTIPORT is not set
# CONFIG_SERIAL_8250_HUB6 is not set
# CONFIG_UNIX98_PTYS is not set
#
# SPI support
#
# CONFIG_SPI is not set
#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
# CONFIG_I2C_PHILIPSPAR is not set
# CONFIG_I2C_ELV is not set
# CONFIG_I2C_MCF_GPIO is not set
# CONFIG_I2C_VELLEMAN is not set
# CONFIG_SCx200_I2C is not set
# CONFIG_SCx200_ACB is not set
# CONFIG_I2C_NETARM_GPIO is not set
CONFIG_I2C_MB_FSLIO=y
CONFIG_I2C_MB_FSLIO_SCL_OUT=3
CONFIG_I2C_MB_FSLIO_SDA_OUT=2
CONFIG_I2C_MB_FSLIO_SCL_IN=7
CONFIG_I2C_MB_FSLIO_SDA_IN=6
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_XILINX is not set
CONFIG_I2C_FM31XX=y
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_PROC is not set
# CONFIG_I2C_DS1307 is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set
# CONFIG_EDB7312_TS is not set
#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set
#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_IPMI_PANIC_EVENT is not set
# CONFIG_IPMI_DEVICE_INTERFACE is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_IPMI_WATCHDOG is not set
#
# Controller Area Network Cards/Chips
#
# CONFIG_CAN4LINUX is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_SCx200 is not set
# CONFIG_SCx200_GPIO is not set
# CONFIG_AMD_PM768 is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_X1226_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
#
# Direct Rendering Manager (XFree86 DRI support)
#
# CONFIG_DRM is not set
#
# Misc devices
#
CONFIG_MICROBLAZE_FSLFIFO=y
CONFIG_MICROBLAZE_FSLFIFO0=y
# CONFIG_MICROBLAZE_FSLFIFO1 is not set
# CONFIG_MICROBLAZE_FSLFIFO2 is not set
# CONFIG_MICROBLAZE_FSLFIFO3 is not set
# CONFIG_MICROBLAZE_FSLFIFO4 is not set
# CONFIG_MICROBLAZE_FSLFIFO5 is not set
# CONFIG_MICROBLAZE_FSLFIFO6 is not set
# CONFIG_MICROBLAZE_FSLFIFO7 is not set
#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_QFMT_V2 is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BEFS_DEBUG is not set
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=m
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=m
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
CONFIG_YAFFS_FS=y
CONFIG_YAFFS_MTD_ENABLED=y
# CONFIG_YAFFS_RAM_ENABLED is not set
CONFIG_YAFFS_USE_OLD_MTD=y
# CONFIG_YAFFS_USE_NANDECC is not set
# CONFIG_YAFFS_ECC_WRONG_ORDER is not set
CONFIG_YAFFS_USE_GENERIC_RW=y
# CONFIG_YAFFS_USE_HEADER_FILE_SIZE is not set
# CONFIG_YAFFS_DISABLE_CHUNK_ERASED_CHECK is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
# CONFIG_CRAMFS is not set
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_JFS_FS is not set
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
# CONFIG_DEVPTS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
CONFIG_ROMFS_FS=y
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set
# CONFIG_XFS_FS is not set
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_RT is not set
# CONFIG_XFS_TRACE is not set
# CONFIG_XFS_DEBUG is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_SMB_FS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_COREDUMP_PRINTK is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
# CONFIG_SMB_NLS is not set
CONFIG_NLS=y
#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
#
# Support for USB gadgets
#
# CONFIG_USB_GADGET is not set
#
# Kernel hacking
#
CONFIG_FULLDEBUG=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_PROFILE is not set
# CONFIG_NO_KERNEL_MSG is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
Reusing 780200E4 key.
Connecting to cable (Parallel Port - parport0).
WinDriver v7.01 Jungo (c) 1997 - 2005 Build Date: Aug 10 2005 X86 32bit
16:24:42.
parport0: baseAddress=0x378, ecpAddress=0x778
LPT base address = 0378h.
ECP base address = 0778h.
ECP hardware is detected.
Cable connection established.
Connecting to cable (Parallel Port - parport0) in ECP mode.
WARNING:iMPACT:2377 - Module xpc4drvr is not loaded. Please reinstall the cable
drivers. See Answer Record 18612.
Cable connection failed.
Connecting to cable (Parallel Port - parport0).
WinDriver v7.01 Jungo (c) 1997 - 2005 Build Date: Aug 10 2005 X86 32bit
16:24:42.
LPT base address = 0378h.
ECP base address = 0778h.
Cable connection established.
ECP port test failed. Using download cable in compatibility mode.
JTAG chain configuration
--------------------------------------------------
Device ID Code IR Length Part Name
1 05045093 8 XCF02S
2 0141c093 6 XC3S400
Assuming, Device No: 2 contains the MicroBlaze system
Connected to the JTAG MicroProcessor Debug Module (MDM)
No of processors = 1
MicroBlaze Processor 1 Configuration :
-------------------------------------
Version............................4.00.a
No of PC Breakpoints...............2
No of Read Addr/Data Watchpoints...1
No of Write Addr/Data Watchpoints..1
Instruction Cache Support..........on
Instruction Cache Base Address.....0x80000000
Instruction Cache High Address.....0x81ffffff
Data Cache Support.................off
Exceptions Support................off
FPU Support.......................off
FSL DCache Support.................off
FSL ICache Support.................off
Hard Divider Support...............on
Hard Multiplier Support............on
Barrel Shifter Support.............on
MSR clr/set Instruction Support....on
Compare Instruction Support........off
Number of FSL ports..............4
MBsfsl(0)-MDMmfsl(0) Connected..........Yes
JTAG MDM Connected to MicroBlaze 1
Connected to "mb" target. id = 0
Starting GDB server for "mb" target (id = 0) at TCP port no 1234
Processor started. Type "stop" to stop processor
Closing MDM communication with Processor 1