There was a bug in the mch_opb_ddr core, in EDK7.1, and I am not sure if it has been completely resolved. It caused pipeline stalls like that you describe.
What is the nature of this bug? Is there a work-around?
Also, there was a bug in the MicroBlaze v4.00.a core, around the same time, whereby partial cache invalidate operations would cause problems when the MCH (CacheLink) channels were used.
What is the nature of this bug? Does it occur when invalidating only part of a cache line? Also, from what I understand, microblaze_v4_00_a is the latest version, so is this bug still active?
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