[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [microblaze-uclinux] Spartan3E board and u-boot question
I have a very strange operations, i was able previously to run de demo
on the board using the boot-onetime.sh but now it doesnt works who
seems to indicate a bad ddr ram. But using xmd i can write to the ddr
ram and read correctly on the memory test application with a processor
with no cache, then use dow command to run the TestApp_Peripheral
doesnt do anything:
Microblaze(1) : microblaze_0
Address Map for Processor microblaze_0
(0x00000000-0x00001fff) dlmb_cntlr dlmb
(0x00000000-0x00001fff) ilmb_cntlr ilmb
(0x24000000-0x25ffffff) DDR_SDRAM_32Mx16
(0x26000000-0x26ffffff) FLASH_16Mx8 mb_opb
(0x40000000-0x4000ffff) LEDs_8Bit mb_opb
(0x40020000-0x4002ffff) DIP_Switches_4Bit
(0x40040000-0x4004ffff) Buttons_4Bit mb_opb
(0x40600000-0x4060ffff) RS232_DCE mb_opb
(0x41400000-0x4140ffff) debug_module mb_opb
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
Driver windrvr6.sys version = 7.0.0.0.No resour
Cable connection failed.
Connecting to cable (Parallel Port - LPT1).
Checking cable driver.
Driver windrvr6.sys version = 7.0.0.0.Cable con
Connecting to cable (Parallel Port - LPT2).
Checking cable driver.
Driver windrvr6.sys version = 7.0.0.0.Cable con
Connecting to cable (Parallel Port - LPT2).
Checking cable driver.
Driver windrvr6.sys version = 7.0.0.0.Cable con
Connecting to cable (Usb Port - USB22).
Checking cable driver.
Driver xusbdfwu.sys version: 1018 (1018).
Driver windrvr6.sys version = 7.0.0.0.Calling s
DeviceAttach: received and accepted attach for:
vendor id 0x3fd, product id 0x8, device handle
Max current requested during enumeration is 150
Cable Type = 3, Revision = 0.
Setting cable speed to 6 MHz.
Cable connection established.
Firmware version = 1018.
CPLD file version = 0006h.
CPLD version = 0006h.
JTAG chain configuration
------------------------------------------------
Device ID Code IR Length Part Name
1 01c22093 6 XC3S500E
2 05046093 8 XCF04S
3 06e5e093 8 XC2C64A_VQ4
Assuming, Device No: 1 contains the MicroBlaze s
Connected to the JTAG MicroProcessor Debug Modul
No of processors = 1
MicroBlaze Processor 1 Configuration :
-------------------------------------
Version............................4.00.a
No of PC Breakpoints...............2
No of Read Addr/Data Watchpoints...0
No of Write Addr/Data Watchpoints..0
Instruction Cache Support..........off
Data Cache Support.................off
Exceptions Support................off
FPU Support.......................off
FSL DCache Support.................off
FSL ICache Support.................off
Hard Divider Support...............on
Hard Multiplier Support............on
Barrel Shifter Support.............on
MSR clr/set Instruction Support....off
Compare Instruction Support........off
JTAG MDM Connected to MicroBlaze 1
Connected to "mb" target. id = 0
Starting GDB server for "mb" target (id = 0) at
XMD% ls
TestApp_Memory bitinit.log libgen.log
TestApp_Peripheral data microblaze_0
__xps etc pcores
_impact.cmd hdl platgen.log
_impactbatch.log implementation platgen.opt
XMD% cd TestAPP_Peripheral
XMD% ls
executable.elf src
XMD% dow -data executable.elf 0x24000000
XMD% mwr 0x24000000 0x55aa55aa
XMD% mrd 0x24000000
24000000: 55AA55AA
It's seems the DDR is working? I'm very confused.
Stephane
On 5/9/07, Leonid <Leonid@xxxxxxxxx> wrote:
Hi, Stephane:
On Wednesday, May 09, 2007 11:30 AM Stephane Rousseau wrote:
> I begin to suspect someting with the DDR SDRAM IP for the Spartan3E
Board.
> I've recreated a small system and used the memorytest application, the
> memory test fails.
Well, I think I may be able to help you. I've looked up my Bugzilla
issues and have found out I've encountered similar issue myself - see
the relevant quotation below:
" I have compiled Petalogix reference project, located in the
.../petalinux-v0.10-rc1/hardware/reference-designs/Xilinx-Spartan3E500-R
evC-edk81, using EDK 8.1. It appeared that RAM doesn't work properly,
namely bits 5 and 21 stay 0 always, I couldn't set them to 1. The
problem has been resolved by replacing mch_opb_ddr v1.00.b by older,
1.00.a version. However it makes sense to look into the root of the
problem - we may bump into similar issue working with Spartan-3e in
future.
It's worth to mention that Petalogix pre-build FPGA image, located in
.../petalinux-v0.10-rc1/hardware/reference-designs/pre-built/Xilinx-Spar
tan3E500-RevC/implementation doesn't have such a problem
though it's presumably built from the source above. Could be that
another EDK version has been actually used."
Try to do the trick I've done (replace the core by older version) - see
what happens.
John Williams may be interested to know regarding this issue as well.
Thanks,
Leonid.
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@xxxxxxxxxxxxxx
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@xxxxxxxxxxxxxx
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/