RE: [microblaze-uclinux] TCP performance and acceleration

["LEGER" <frederic.leger@xxxxxxxxxxxxxx>]

Hi,

With a 100Mhz Microblaze Uclinux 2.4 and OPB_EMAC with DMA and normal
1460bytes/frame, I did some benchmarking.
Board is a MEMEC V4LX25MB. 

It is highly dependant of the C++ program under WindowsXP (you have to put
some usleep() between TCP function calls ). It is better if the FPGA is
already running before booting the PC because of WindowsXP TCP stack.

You can easily tune to get PC->FPGA : 8Mbits/s    FPAG->PC: 22Mbits/s
(average tests done with 10000frames)

To get better results, my understanding is that you need Jumbo Frames of
9KB. You should easily reach 100Mbit/s FPGA->PC without checksum offloading,
data realignment engine and zero copy stack.

Best regards,

Frédéric LEGER



 

-----Message d'origine-----
De : owner-microblaze-uclinux@xxxxxxxxxxxxxx
[mailto:owner-microblaze-uclinux@xxxxxxxxxxxxxx] De la part de Jim Van Vorst
Envoyé : mercredi 8 août 2007 17:56
À : microblaze-uclinux@xxxxxxxxxxxxxx
Objet : Re: [microblaze-uclinux] TCP performance and acceleration

That's what I'm getting.  I'm looking into dma, checksum offloading, data
realignment engine, zero copy stacks etc.  You might want to take a look
here:

http://www.treck.com/xilinx.pdf

Anyone have experience with the Treck stack?

Brettschneider Falk wrote:
> Hi,
>
> I'd just like to know what your TCP throughput with your microblaze-based
system is. My TCP stack completely runs in the uClinux kernel (without
hardware acceleration) and I get about 1 MB/s with TCP/IP sending.
> And what can I do to tune it to more MB/s and what is the maximum rate I
could achieve?
> I've already thought about doing memcpy() or computing the checksum
FPGA-accelerated but I don't know how much gain that would bring.
> Do you have any experience with it?
>
> Cheers, F@lk
>
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