Watts, Jim wrote:
I'm trying to use the Digilent Xilinx Spartan3E-1600 board with the reference design I downloaded from the petalinux website. I've tried the 9.1 and 8.2 versions (using the appropriate versions of Xilinx tools) put can not meet timing. Is there a trick I'm missing? I did try inserting input buffers on the PHY tx and rx clocks (as was done in the Avnet uClinux port), but that didn't help.
AFAIRC, I had the same problem when I was playing with the digilent s1600e. I had to increase the P&R and mapping effort levels to high. Then it worked.
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