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Re: [microblaze-uclinux] DMA
Hi Jim,
We have used DMA from IO, rather than the stand-alone DMA controller, but
we've always setup the memory controller decoding to have multiple images of
the DRAM then cached and used a lower one for everything but DMA access and
used a higher, non-cached image for DMA operations.
Regards,
Jim Law
Iris Power
----- Original Message -----
From: "Jim Van Vorst" <jvanvorst@xxxxxxxxx>
To: <microblaze-uclinux@xxxxxxxxxxxxxx>
Sent: Friday, February 08, 2008 6:02 PM
Subject: [microblaze-uclinux] DMA
Has anyone gotten the OPB DMA controller to work? I'm just trying to DMA
between cacheable regions of DDR and it's really flaky. I've tried all
kinds of combinations of enabling/disabling/invalidating cache and it
still either occasionally hangs or results in incorrect data. It does
seem to work consistently between non-cacheable regions. I saw some
traffic about using DMA for memcpy. Did that ever go anywhere?
Thanks,
Jim
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