|
Hi Goran, Thanks, I forgot about the byte write
enables in S3E. Would this apply to both the instruction
and data caches or only the data caches? My apologies, I am going through the
docs to find this out but haven’t been successful yet. However, my customer has selected the area
optimized version for Microblaze (v6.00b) and still sees the problem when using
anything less than 8K. The problem manifests itself in software
errors, e.g. when they perform their compression algorithm on some files and
read/write that to memory. Any other ideas? Thanks, Stephan Xilinx Dedicated
Field Applications Engineer Nu Horizons Asia Tel : +61 2
9746 1411 Fax : +61 2
9746 1511 Cell : +61 4 2225
1680 From: owner- Hi Stephan, You can't have less than 8kbyte data caches on a FPGA
architecture that doesn't support byte-writes on BRAMs. This applies for the performance version of MicroBlaze. The
area version can go down to 2kbyte (1 BRAM) even on architectures that is
missing byte-writes. Göran Från: owner- Hi, A customer of mine is Petalinux and has some DDR connected
to the system. When the cache is 8K all accesses to memory appear to be fine. When the cache is lowered to 4K (to save on BRAMs required
elsewhere) they find that the memory accesses get corrupted. While I know “corrupted” doesn’t say much
I myself have not investigated in depth how or in what form the corruption
presents itself, however, I wanted to find out whether there were any known issues
with using cache sizes of less than 8K with Petalinux exist or if anybody had
seen similar things happen? As far as I can tell there should be no issue here. The target device is a XC3S1600E for reference. Thanks, Stephan |
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