[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[microblaze-uclinux] simulate my design



hi!

i've got a strange problem with my user logic. but to debug this, i cannot use try-and-error every time
because it takes so much time to compile and synthesize the whole design.
so i got the idea to simulate my design - but i don't know if this is possible.
can i simulate only my ip logic or also simulate the complete system? i cannot imagine how that would work.
would anybody be so kind and help me with some hints or document-links how to achieve this?
i'm using xilinx edk and ise 9.1.

thank you in advance

sebastian
___________________________
microblaze-uclinux mailing list
microblaze-uclinux@xxxxxxxxxxxxxx
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/