RE: [microblaze-uclinux] some questions

[Aleš Gorkič <ales.gorkic@xxxxxxxxxxxx>]

Very late, but 
DMA SG documentation is located under:
HW    EDK\hw\XilinxProcessorIPLib\pcores\dma_sg_vX_XX_X\doc\
SW	EDK\sw\XilinxProcessorIPLib\drivers\dma_vX_XX_X\doc\


Cheers,

Ales

> -----Original Message-----
> From: owner-microblaze-uclinux@xxxxxxxxxxxxxx [mailto:owner-microblaze-
> uclinux@xxxxxxxxxxxxxx] On Behalf Of Sebastian
> Sent: Tuesday, August 12, 2008 4:50 PM
> To: microblaze-uclinux@xxxxxxxxxxxxxx
> Subject: Re: [microblaze-uclinux] some questions
> 
> Thank you Aleš and John for your answers.
> 
> - Is it true that MPMC and NPI are only provided by EDK 10.1 and not in
> my 9.1 Version?
> 
> - Sorry, but i cannot find any IPIF signal protocol documentation for
> setting DMA transaction parameters that you've mentioned. Could anyoone
> help me?
> 
> regards,
> Sebastian
> 
> 
> Aleš Gorkič schrieb:
> > Hi Sebastian,
> >
> >
> >> Sebastian wrote:
> >>> 1.
> >>> i created an embedded system based on the petalinux reference design
> for
> >>> spartan-3e1600 and edk 9.1.
> >>> i added my own ip which creates some data that is written to a
> included
> >>> ipif-readfifo.
> >>> i use the ipif-dma s/g controller to transfer the data to the system
> ddr
> >>> ram. i've written a testing
> >>> program to benchmark the transfer rate. my results are about 16 MByte
> /
> >>> s. i've estimated a transfer
> >>> rate about 200 mbyte / s if the dma-c uses burst mode an no one else
> is
> >>> using the opb.
> >>> could it be that the ddr sdram is the bottleneck? i read something
> about
> >>> ddr ram burst mode an i think
> >>> this isn't enabled in the reference design. can anyone help me out
> with
> >>> some information?
> >> The mch_opb_ddr controller has a parameter C_INCLUDE_OPB_BURST_SUPPORT,
> >> which defaults to zero.  You might like to enable that and retest your
> >> performance.
> >>
> >> Similarly if you upgrade to newer tools and the MPMC, it has
> >> C_SPLB*_SUPPORT_BURSTS parameters for burst support on PLB PIMs.
> >
> >
> > The BURST performance is cruical if you need fast xfer of large blocks
> of data (C_INCLUDE_OPB_BURST_SUPPORT=1). I've created custom OPB DMA
> peripheral which transfers large block of data from FIFOs to SDRAM. The
> sustainable data rate is around 100MB/s. Since the DMA controller is
> configure by Microblaze the bottleneck is a Microblaze interrupt handling.
> Even higher transfer rates are achieved using polling, but cunsumes
> processor time.
> >
> >
> >>> 2.
> >>> in my own ip, i'm filling the fifo with data. once it is full, i want
> to
> >>> initialize a dma transfer.
> >>> so i have to trigger that transfer from within my userlogic.vhd with
> >>> writing into the LENGTH register
> >>> of the dma controller. how can i achieve this? i cannot write into the
> >>> dma s/g registers, can i?
> >> Are you using the S/G DMA functionality of the IPIF, or is it a
> >> sstandalone DMA controller?  If it's the first one, then there's an
> IPIF
> >> signal protocol for setting DMA transaction parameters, I believe.
> >> Check the IPIF documentation.
> >>
> >> If you have a standalone DMA controller then the transaction will need
> >> to be configured into it's OPB/PLB registers somehow, either by a SW
> >> dirver or your core bus mastering to write the params.  Not very
> >> efficient.
> >>
> >>> 3.
> >>> to see how the dma-c transfers the data over the bus, it would be very
> >>> useful to see all the bussignals.
> >>> i read something about the bus functional model testing but i think i
> >>> need some extra software for this:
> >>> chipscope or modelsim? can i simulate without buying this extra
> >> software?
> >>
> >> You can use the BFM toolkit and modelsim.  ModelSim XE is free but only
> >> works on Windows.
> >>
> >> Or, ChipScope can watch signals live on the FPGA.
> >>
> >> Otherwise, maybe route the bus signals to external pins and hook up a
> >> logic analyser.
> >
> >
> > From what I heard I would go for the MPMC memory controller and NPI
> interface. It is exactly what you need. It is easy to use with massive
> bandwidth.
> > IPIF SG/DMA is large and inefficient for high bandwidth.
> >
> > And definatelly try a Chipscope. Otherwise you are "blind".
> >
> >
> > Cheers,
> >
> > Ales Gorkic
> >
> > ___________________________
> > microblaze-uclinux mailing list
> > microblaze-uclinux@xxxxxxxxxxxxxx
> > Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
> > Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-
> uclinux/
> >
> ___________________________
> microblaze-uclinux mailing list
> microblaze-uclinux@xxxxxxxxxxxxxx
> Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
> Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-
> uclinux/


___________________________
microblaze-uclinux mailing list
microblaze-uclinux@xxxxxxxxxxxxxx
Project Home Page : http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/microblaze-uclinux/