Re: [microblaze-uclinux] checksum offload with ll-Temac on ML506

[John Williams <john.williams@xxxxxxxxxxxxx>]

Hi Paul,

On Fri, Mar 20, 2009 at 9:27 PM,  <paul.oppeneer@xxxxxxxx> wrote:

> Currently i'm working using a ML506 with xll-Temac(Petalinux).
> I enabled TX and RX hardware checksum offloading in the Xilinx Platform
> Studio. I also set the TxCsum and RxCsum in the xlltemac driver.
>
> I assume checksum offloading is working because transferring over TCP/IP
> won't work if i use an FPGA image build without setting these offload
> features. Transferring will work when setting these offload features.

Sounds right.

> The problem is that the transferrate will not improve on using checksum
> offloading in my case. The transferrate is still about 10Mbps.

10Mbps sounds a little slow, we've typically seen around 24-25MBps on
a custom V5 platform (not ML505 but similar).

> Am i doing something wrong here? Is there anyone who succesfully used
> checksum offloading on xlltemac and noticed a performance increase? Or is
> the xilinx_lltemac driver simply not ready for it?

We don't see any real improvement with TX/RX csum offload either.  As
I think I mentioned on the list recently, we haven't done any serious
profiling to see where the bottlenecks are, but it's on the list.

Sorry I haven't got anything more concrete for you right now, but
we'll let you know when the situation changes.

Regards,

John
-- 
John Williams, PhD, B.Eng, B.IT
PetaLogix - Linux Solutions for a Reconfigurable World
w: www.petalogix.com  p: +61-7-30090663  f: +61-7-30090663
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