Re: [microblaze-uclinux] Re: Setting up Flash and SPI on Spartan 3E Starter Kit

[John Williams <john.williams@xxxxxxxxxxxxx>]

Hi Matt,

On Thu, May 7, 2009 at 4:04 PM, Matt Staniszewski
<matt.staniszewski@xxxxxxxxx> wrote:
> I've created an IP core in EDK that should route the signals to the SPI MISO
> and Flash DQ pins as needed.  Here's the VHDL code from the module:
>
> entity flash_adc_ctl is
>     Port ( PINS_I : in  STD_LOGIC_VECTOR(7 downto 0);
>            PINS_O : out  STD_LOGIC_VECTOR(7 downto 0);
>            PINS_T : out  STD_LOGIC_VECTOR(7 downto 0);
>               FLASH_DQ_I : out  STD_LOGIC_VECTOR(7 downto 0);
>            FLASH_DQ_O : in  STD_LOGIC_VECTOR(7 downto 0);
>            FLASH_DQ_T : in  STD_LOGIC_VECTOR(7 downto 0);
>            SPI_MISO_I : out  STD_LOGIC);
> end flash_adc_ctl;
>
> architecture Behavioral of flash_adc_ctl is
>
> begin
>
>     SPI_MISO_I <= PINS_I(7);
>     FLASH_DQ_I <= PINS_I;
>     PINS_O <= FLASH_DQ_O;
>     PINS_T <= FLASH_DQ_T;
>
> end Behavioral;

Hmm, shouldn't you be muxing and demuxing on the SPI and Flash chip selects?

Basically, if the flash memory controller's CS is high, then route
to/from the flash.  Otherwise, the ADC, or something similar.  Just
connecting them up with a hard-wired T structure smells like trouble.

Cheers,

John

> I've tested this module with the ADC in an EDK project without uclinux and
> it worked fine, but I haven't been able to test the flash.

You might try Xilinx's flash_writer TCL scripts.

Cheers,

John

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