[partial-reconfig] Inter-module Communication

["Tyrone Kwok" <tokwok@xxxxxxxxxxx>]

Hi all,

Suppose that in my design, there are three parts in the FPGA:

  |A | B | C |

and that B is a reconfigurable moudle while A and C are static.

My question is how inter-moudle communication is done in the
following situations:

1. C needs to use some I/O pins in A, and the I/O signals
can't be interrupted after the system starts.

2. C needs to use some I/O pins in B, and the I/O signals
can't be interrupted after the system starts.

For situation 1, I think the commuication can be done using
bus macros, right ?

For situation 2, I have no idea on how to main the connection
while B is being reconfigured.


Thanks in advance for any idea given !!!

Cheers,

tk

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