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Re: [partial-reconfig] Inter-module Communication
Tyrone Kwok wrote:
> Thanks very much, Sean.
>
> BTW, if the I/O signals are of INOUT type, the manual routing seems
> complicated ...
> Have you done this before ?
No... Xilinx recommends not to use bus macros to transfer bidirectional
signals in xapp290. In my work I haven't tried to but instead have used
seperate connections for in, out and tristate enable signals and
connected those to an iobuf-primitive. I think the problem is that the
enable-signals for the tristate buffers on both sides of the bus macro
have to be set simultaneously (so you never have more than one active
driver on the bus), so you have to somehow get the enable-signal across
the macro, which introduces considerable delay.
--
Best regards,
Sean Durkin
Fraunhofer Institute for Integrated Circuits IIS
Dep. Electronic Imaging - HIS (Bildsensorik - HIS)
Am Wolfsmantel 33
91058 Erlangen
Germany
Fon: +49 9131 776 503
Fax: +49 9131 776 598
Web: http://www.iis.fraunhofer.de
mailto:durkinsn@iis.fraunhofer.de
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