Re: [partial-reconfig] Problem with Bus macro in Virtex-II

[<jedward@xxxxxxxxxx>]

I modified the bus macro with FPGA EDITOR, and put the correct brackets
<>, but the error appear again, i donīt know how modified the bus macro in
hexedit.Can you help me with this??
If you send me your e-mail, i could send you my bus macro file modified
for correcting the problem.
Thanks in advance.

> Hi John
>
> jedward@lme.usp.br wrote:
>> I am using ISE6.2i, and Virtex-II X2CV1000. When i use:
>>
>>  "ngdbuild -modular initial top.ngc"
>>
>> The tool reports some errors with the bus macro, like this:
>>
>> Reading component libraries for design expansion...
>> Loading device for application ngdbuild from file '2v1000.nph' in
>> environment C:/Xilinx.
>> Loading macro from file "E:\John\exemplo\top\inicial/bm_4b_v2.nmc".
>> ERROR:NgdBuild:76 - File "E:\John\exemplo\top\inicial/bm_4b_v2.nmc"
>> cannot be merged into block "BM_reconfig_1_to_capture_result"
>> (TYPE="bm_4b_v2")because one or more pins on the block, including pin
>> "LI<3>", were not found in the file.
>
> There is a Xilinx answer record on this one:
>
> http://support.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=14848>
> Basically it's to do with signal vectors using the '< >' vs '( )'
> synatx.  If I remember rightly, I just hand edited the bus macro file
> in  hexedit, and changed the characters appropriately.
>
> Cheers,
>
> John
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