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Re: [partial-reconfig] partial reconfiguration
Hi Nizar,
Nizar Sakr wrote:
> Thanks John for the files and all your tips, I want to take a look at the
> code and later even use it entirely to access the HWICAP, however, for the
> moment i'm still going over and over the xapp290 to create a partial
> bitstream to test the hwicap with the microblaze without uClinux, I'm not
> very familiar with all the tools that i'm supposed to use to create a
> partial bitstream according to that document, such as FPGA editor and
> floorplanner and I can't seem to find any documentation nor tutorials for
> these tools, if you can refer me to anything that might help me or even if
> you can simply show me a simple example such as a one bit adder and how it
> can be constrained to a column on a virtex-2 in floorplanner for example,
> I would super appreciate it, it's always that initial step that is the
> hardest to achieve,
> Any help would be very much appreciated,
ngdbuild, map and par are all fully documented. When you installed ISE,
there would have been created a link on your desktop to the
documentation (if under Windows). Else under linux, just search the
ise6.2 subdirectory tree for PDF files - you'll find it. They explain
all of the options, and the different flows and so on. It's quite
dense, but essential to read very carefully in conjunction with XAPP290.
Floorplanner has online help, in lieu of standalone documentation. Also
the PACE tool can be used to define location constraints.
You should probably expect to spend two or three weeks just manually
stepping through a build process (ie run xst, ngdbuild, map, par by
hand), reading and re-reading the doco (+ XAPP290), until you really
understand it enough to try and create your own examples. Try first to
understand the modular flow, since the partial flow is really just a
specialisation (hack?) of modular.
As specific questions arise, I'm sure someone on this list will be able
to help, and of course the comp.arch.fpga newsgroup is also helpful.
Cheers,
John
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