Re: [partial-reconfig] Bus macro creation

["John Esquiagola" <jedward@xxxxxxxxxx>]

Hi Tom,

I did my special bus macro.  After the recompilation process, i only
modified the position of the column and the Buffer associated.

original:

inst "t1A_(3)" "TBUF" , placed R24C7 TBUF_X12Y0 ,
cfg "TINV::T IINV::I _SUPERBEL::TRUE"

modified:

inst "t1A_(3)" "TBUF" , placed R24C3 TBUF_X4Y0 ,
   cfg "TINV::T IINV::I _SUPERBEL::TRUE"

Finally, when i recompiled to ncd, the routing is no complete then i did
manual routing of the lines using FPGA EDITOR.

Best regards.
John Edward Esquiagola Aranda
Laboratorio de Microeletrônica
Escola Politecnica da Universidade de São Paulo


----- Original Message -----
From: "Thomas Reinemann" <Thomas.Reinemann@Masch-Bau.Uni-Magdeburg.DE>
To: <partial-reconfig@itee.uq.edu.au>
Sent: Wednesday, August 25, 2004 5:56 AM
Subject: [partial-reconfig] Bus macro creation


> Hello,
>
> I need a special bus macro. I have three reconf modules a, b , c from
> left to right. The signals shall be driven in a and read in b and c. In
> a first step I recompiled the Xilinx bus macro, and want now to edit it.
> But I have no imagine what the pips are?
>
> Bye Tom
> ___________________________
> partial-reconfig mailing list
> partial-reconfig@itee.uq.edu.au
> Mailing List Archive :
http://www.itee.uq.edu.au/~listarch/partial-reconfig/
>
> .
>

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