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[partial-reconfig] Problems, problems and more...
1. ) I have a design for VirtexII 250 and it routes fine, but the same
design fails to route for a Virtex II 1000... I was thinking it would
route easily given the extra space, but it doesn't... and yes I did make
the requisite changes to the code etc...
2. ) I've started work on JBits, but for some reason, every bitstream I
read and enter into a byte array ( using jbits.generate () ) is the
same... I've tried bitstreams I've created for different designs, and
the ones from xapp290, and I get the same output for each one... I can't
figure out what the error is in my code, since it is very
straightforward and only reads the bitstream, puts it into the byte
array and reads out the byte array...
3. ) I've searched all over the 'net and have yet to recieve a
satisfactory answer to the Bus Macro question... in fact questions... in
particular:
3a . ) If you LOC the BM to a TBUF site, say TBUF_x20Y40, how is it
on the module boundary, even if one module ends at x = 19 and the
other begins at x = 20? I mean isn't it inside the second module?
Also, when you specify its position at x = 20, does that location
indicate the boundary within the BM, i.e. the place where there are
four columns of tri-state buffers on both the left and the right
side? If so, shouldn't it be possible to hard route the select
lines from the non-reconfigurable part and not rely on external
lines?
3b . ) I've asked this before... I can't figure out the tribusR1,
tribusL2 etc in xapp290... why do they concatenate the BM control
lines in such exact ways? And since the xapp290 BMs are at x = 6 (
not a multiple of 4 ) and at x = 20 ( not on module boundaries ) ,
how should one modify the concatenation to cater to a proper
placement of the BMs?
Thanks in advance... :) ...
--
Umar Mushtaq
misfit_05@fastmail.fm
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