[partial-reconfig] Partial reconfiguration with the ICAP

["karel.bruneel@xxxxxxxxxx" <karel.bruneel@xxxxxxxxxx>]

Hi all,

I'me trying to create a system which reconfigures itself via the ICAP. I'me doing this on the ml310 board.

My problem is that on the ml310-board the sysace pins are located on the top left side and the icap is located in the lower right corner of the device (XC2VP30). I want to store my partial bitstreams on the sysace and reconfigure the device via the icap. To do this I created a left module which contains a microblaze to reconfigure the device via the opb_hwicap IP. I extracted the ICAP from this IP and instanciated it myself in the right module. To connect the left and the right module I created a busmacro of my own with TBUFS in the left and the right module simular to the busmacros delivered by xilinx. The only difference is that the left and right module are seperated by a center module which is crossed by the connections of my busmacro. The right module only containes the conections from the right TBUFs of my busmacro to the ICAP. The center module is the one that needs to be dynamically reconfigured.

I have run through the hole modular design flow as explaned in XAPP290. This way I get a full bitstream and a couple of partial bitstreams (I didn't use jbits).

When I try to upload a bitstream via the ICAP the system blocks. I don't understand why, the routing to the icap is identical in every partial bitstream and xilinx guaranties glichless partial reconfiguration in this case. Are there some perticular things I might have overlooked? Is it nessesery to use jbits to create the partial bitstreams?

When looking in to the problem I found something strange. My microblaze can drive some leds on the board via an opb_gpio. The led pins are located in the center module so I used the xilinx busmacro to feed the lines from the right module to the center module. As a test I programmed the microblaze to count and put the counter value on the leds. When I download the full bitstream the leds flash as expected. As a test I tryed downloading the partial bitstream that was already in the full bitstream. I expected to see no effect, but when I download the partial bitstream the flashing of the leds is interupted during the download. Does this have something to do with the problem above? Does this have anything to do with the configuration of the FPGA on the ml310 board? Do you know what can cause this?

Is what I try to do possible?

Where can I find more information on this issue?

Has anyone tryed a simular thing on the ml310 board?

Thank you very much,
A desperate Karel Bruneel





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