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Re: [partial-reconfig] "Modularization" of Microblaze flow



> Dimitris-
>
> Yeah-- we've considered the idea of routing the external pins out
> of the reconfigurable module but to do so requires a lot of bus
> macros.  Since there are a limited number of tbuf's ... I'm concerned
> we'll run out of I/O that spans the reconfigurable and static modules.
Yes that is very possible...

> That's next week's issue.  Right now we are just trying to get a static
> configuration with BM4's added to an EDK-generated design.  The BM4's
> have to go at the top level and we're running into synthesis errors.
> It's probably a tool flow issue ... we're digging through the makefiles.
>
> Have you gotten a static design with BM4's yet?  Has anyone?
  
  I have done a static design with BM4's (actually bm8 used as a bm4 wrapper) 
but not an EDK-generated one. A few months ago Gregory Mermoud (i think he is 
also a member of this list) had posted a tutorial that has a simple 
Incrementer-Register Example (this is the design i have tested):
   
         http://ic2.epfl.ch/~gmermoud/files/publications/DPRtutorial.pdf
  
  I have just changed the bus macro names in vhdl from bm_4b_s2 (the example 
refers to spartan family)  to bm_4b_v2 and used the corresponding nmc file 
from XAPP290.zip . 
   From then onwards  i used the floorplanner to produce constraints for my 
VIRTEXII XCV1000 board (the famous MBVanilla board). 
   This design worked and i managed to produce partial bitstreams BEFORE 
installing  ISE & EDK 6.3 SP3. Gregory outlines that he faced problems with 
Par tool after installing SP3 but i have not tested it myself.   

  Unfortunately this design does not connect Bus direction bits (RT,LT,RI,LI) 
directly to LUT's in order to have constant values. I have read that one 
might face problems if he needs to hardcode bus directions.
   

  Dimitris


--
Dimitris Syrivelis
Dept of Computer Engineering & Telecommunications ( www.inf.uth.gr )
University of Thessaly 
Volos
Greece
Tel +302421074973

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