[partial-reconfig] Bus Macro configuration

["Devadutt" <mcs042450@xxxxxxxxxxxxxx>]

Hello All,

I am new to partial reconfiguration and have a couple of doubts.
I am trying to create bus-macros to connect my fixed and
reconfigurable modules. My doubt is regarding the constaints file (UCF).

How do I know which pins to map the bus macro's LT and RT ports ?
I understand that one of them (LT and RT) must be pulled up and the other
must be pulled down.

The XAPP290 does this by mapping the LT and RT with 'triL1', 'triR1',
'triR2', 'triL2' inputs of 'alu' module. These location of these
'tri...' pins are specified in the constaints file.

Can you please let me know, how I am suppose to chose these pin locations
on the FPGA?

I am using an Alpha-Data XC2V3000-6FF1152 board.

Thanking you in advance.


Regards,
Devadutt
Master's student
Computer Science and Engineering
Indian Institute of Technology - Delhi




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