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[partial-reconfig] Small questions about Microblaze in a Partial Reconfiguration design
Hi All,
It's me again. I am sorry but I really tried my best to cut down on my
questions. But I think you will all agree with me that this Partial
Reconfiguration feature is attractive but yet the current support is just
a mess.
I have a very simple question. For those of you who have Microblaze system
as one of a fixed module (or reconfigurable), in EDK, I assume the "Design
Hierarchy" is set to "This is a sub-module in my design"? (since another
top level file will be created that contains the Bus Macro delarations,
etc.)
After generating the Netlist and exporting it to ISE, "system.ngc" and
system_stub.ngc are created in "implementation". My question is:
1. do you use this generated system.ngc? or you open up the ISE project,
remove system_stub.vhd, and synthesize system.vhd (with "Add I/O buffers"
unchecked?)
2. Is "Keep Hierarchy" option "yes" or "no"?
3. In "system_stub.vhd", there are buffers generated because it uses DDR.
My question is, do I need to LOC these generated I/O bufferes in UCF?
I am so sorry for so many questions. Your time and assistance is much
appreciated. Thank you.
Peter Lee
--------------------------------------
OPRAL Research Lab, Ryerson University
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