[partial-reconfig] Bus Macro MAP problem

[Ian Colwill <I.Colwill@xxxxxxxxxxxx>]

Hi Everyone,

I would be really for any help or advice you can offer me on the following.

I have created a simple tri-state bus as a macro using xdl. The design 
consists of two TBUFs driving a single long line.(See attached Image)

I attach external macro pins to Out, Enable and In of each TBUF. 
However, when I try to include the macro in a design, the DRC in the map 
phase complains that the Out pin is being driven by two sources. MAP 
Error Message:

ERROR:MapLib:22 - Bus M0_DATA_LEFT_O_OBUF driven by bm_instance and 
bm_instance has multiple active drivers.

This is not correct, as the O pins are external macro outputs! Is there 
anyway to prevent this?

Xilinx don’t list any help for this Error.

/Ian.