Re: [partial-reconfig] Modular Design in ISE 6.2 environment

["Remy Eskinazi" <res@xxxxxxxxxxx>]

Dear Jason,

Thank you for the informations :-))

Best regards

Remy Eskinazi




----- Original Message ----- 
From: <jagron@ittc.ku.edu>
To: <partial-reconfig@itee.uq.edu.au>
Sent: Sunday, June 19, 2005 10:26 PM
Subject: Re: [partial-reconfig] Modular Design in ISE 6.2 environment


> Remy:
>
>  I have been working on the same sort of thing only with 6.3 and 7.1 and
> I have created some documentation about how to create a partially
> reconfigurable modular design using EDK and ISE.  The documentation can
> be found at this address:
>
> http://wiki.ittc.ku.edu/rtrjvm/EDK_and_MD
>
> I have created this b/c the process is very cumbersome, but hopefully this
> documentation will help you and others.
>
>
> -Jason Agron, University of Kansas
>
>
>
>
>> Dear All,
>>
>> I'm working actually in a partially reconfigurable design starting from
>> EDK 6.2 and export to ISE 6.2 in order execute the modular design flow as
>> described in xapp 290 and chapter 4 of ISE developers guide. My question
>> if is possible to execute the Xilinx Modular Design in ISE environment
>> (starting the creation of the necessary directory structure trought the
>> final assembly) or it's possible only in the command line window?
>>
>> Thanks in advance,
>>
>> ==================================================================================
>> Remy Eskinazi
>> PhD Student - Informatics Center
>> Federal University of Pernambuco
>> Recife - PE - Brazil
>> res@cin.ufpe.br
>> Phone +55-81-2126.8430 R - 4010
>>>>Research Interests: Reconfigurable Systems, Field Programable Devices,
>> SOCs, Microcontrollers Architectures<<
>> ==================================================================================
>>
>>
>>
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>
>
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