Re: [partial-reconfig] Problem with partial bitstream

["Lakshmi Narasimhan. S" <sulakshm@xxxxxxxxxxxxxxxxxxxx>]

I should have specifically mentioned ml310 board.
sorry about that.

Thanks
LN

On Wed, 3 Aug 2005, Lakshmi Narasimhan. S wrote:

> Hello David,
> Its really nice to know (although ironic) that am not alone :)
> Have you had any success with any other designs? Can you post
> those sample designs here so that I might try it out on my board,
> just to know things work!
>
> Moreover I would like to know how do you cope with many external
> ports in your design? Which pins do you use? Seriously this looks
> too silly, but I cant find an easy solution, there is nothing
> apart from clocks and leds that I can see using for my design.
>
>
> And I will try with the newer version of ise and reply how
> it goes.
>
> Till then.
> LN
>
>
>
> On Wed, 3 Aug 2005, David Kramer wrote:
>
> > Hello,
> >
> > I've got the same problem as you.
> > I also tried this tutorial. (Has anyone tried this tutorial with ISE
> > 7.1i? The design only ran through with ISE 6.3sp3 here) But got the same
> > problems.
> > After adapting the design to the Virtex2pro in the ML 310 (e.g. new
> > constrains, other Pins, new Clk_div, ...), the design ran through the
> > whole process without any error message. All full bitstreams work as
> > they should. But the partial bitstreams doesn't change anything. and I
> > don't know why.
> >
> > I also got this problem with an difference based approach earlier. After
> > changing the design in the FPGA Editor and running bitgen with the
> > option -r, I got an partial bitstream. (50 Frames had to be
> > reconfigured) The full bitstreams work quite well, but the partial
> > bitstream didn't changed anything. All it has done was causing some
> > trouble with iMPACT after reconfiguring the FPGA with it.
> >
> > Any help would be appreciated!
> >
> > Best regards,
> >
> > David Kramer
> >
> >
> >
> >
> > Lakshmi Narasimhan. S wrote:
> >
> > >Hello Group,
> > >How you all doing?
> > >
> > >I have a virtex II pro ml310 fpga board in initial stages
> > >of dynamic partial reconfiguration.
> > >I went through all the mails in this group, so that in itself
> > >is a good exposure letting me know a few tricks and
> > >also how far people have progressed with dynamic reconfig.
> > >
> > >As happens with every newbie.. I am with my first design and
> > >have problems.
> > >
> > >I am with variable led blinking as my first design as pointed
> > >in http://elektronica.ehb.be/reco/Reports.htm.
> > >(I read DPRtutorial but didnt try that example for reasons mentioned
> > >below)
> > >
> > >I ran through the modular design flow successfully, and all my
> > >assembled bitstreams work.
> > >
> > >But my partial bitstreams do not change the functionality at all.
> > >I saw an mail on this earlier saying that the bitstream could be
> > >corrupted. But I have rerun my flow more a dozen sickening times
> > >and am yet to see any difference.
> > >
> > >Since there werent any errors I do not know where to begin now.
> > >
> > >My second question. I have a ml310 board, and I do not see any
> > >external pins except for leds as outputs and clocks as inputs.
> > >So I was wondering how people manage for simple designs
> > >on those boards for more pins? How do they connect?
> > >For example, even one more pin, say "Reset" I do not know where to
> > >connect.
> > >
> > >And since this is my first design I am skeptical to try a large
> > >design. Can people having ml310 boards offer some inputs.
> > >
> > >Thanks and waiting for your reply.
> > >LN
> > >
> > >
> > >
> > >
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> > >
> > >
> >
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