Re: [partial-reconfig] Partial Reconfiguration Area Constraints

[Grégory Mermoud <gregory.mermoud@xxxxxxxxx>]

Since a wrong routing may destroy your FPGA, I advise you to check
manually for each design. Well, it depends on your FPGA and,
specially, its cost :) Do not forget that partial reconfiguration is
still somehow *experimental* and thus, as in many experimental matter,
you cannot really trust the tools...

On 8/17/05, Harish Vutukuru <harish.vutukuru@gmail.com> wrote:
> Hello all,
>  
>  It has been mentioned in the Xilinx partial reconfiguration app note that
> one must "physically" open the design in FPGA Editor and observe the design
> to make sure the routing is within the specified area.  I have experimented
> with several designs using the Xilinx modular design flow and have observed
> that whenever a designs' area constraints are not met the Placer and route
> tool reports an error.  I would like to know if one can completely depend on
> the Place and Route tools report to decide if the area constraint is not met
> (for routing and logic) or one should always resort to manual observation. 
>  
>  Thanks
>  Harish
>  


-- 
Grégory Mermoud <gregory.mermoud@epfl.ch>
Master student in Computer Science
School of Computer and Communication Sciences
Swiss Federal Institute of Technology - Lausanne (EPFL)
<http://ic2.epfl.ch/~gmermoud>

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