RE: [partial-reconfig] Partial Reconfiguration Area Constraints

["Javier" <jcastillo@xxxxxxxxxxxxx>]

Hello Grégory,

  I have read many times that an incorrect routing can damage the FPGA, also
I eared that a wrong encrypted bitstream could also damage it. But I don’t
know anybody that has damage one. Since the bitstream has CRC mechanism it
not possible to send a bad encrypted one to the FPGA. I am working with the
ICAP and until I wrote the ICAP controller successfully (bits inverted) I
sent wrong bitstreams to the FPGA and because of the CRC it just ignores
them. I also don’t understand how a wrong routing can destroy the logic, I
can imagine some cases but they are very tricky. Obviously I am not going to
try to destroy one FPGA to ascertain if it could be done, but I am
interested on it and I want to know if they are legends or really a FPGA
could be damage with a bitstream.

Regards

Javier Castillo
Universidad Rey Juan Carlos
Madrid (SPAIN)
javier.castillo@urjc.es


-----Mensaje original-----
De: owner-partial-reconfig@itee.uq.edu.au
[mailto:owner-partial-reconfig@itee.uq.edu.au] En nombre de Grégory Mermoud
Enviado el: miércoles, 17 de agosto de 2005 9:54
Para: partial-reconfig@itee.uq.edu.au
Asunto: Re: [partial-reconfig] Partial Reconfiguration Area Constraints

Since a wrong routing may destroy your FPGA, I advise you to check
manually for each design. Well, it depends on your FPGA and,
specially, its cost :) Do not forget that partial reconfiguration is
still somehow *experimental* and thus, as in many experimental matter,
you cannot really trust the tools...

On 8/17/05, Harish Vutukuru <harish.vutukuru@gmail.com> wrote:
> Hello all,
>  
>  It has been mentioned in the Xilinx partial reconfiguration app note that
> one must "physically" open the design in FPGA Editor and observe the
design
> to make sure the routing is within the specified area.  I have
experimented
> with several designs using the Xilinx modular design flow and have
observed
> that whenever a designs' area constraints are not met the Placer and route
> tool reports an error.  I would like to know if one can completely depend
on
> the Place and Route tools report to decide if the area constraint is not
met
> (for routing and logic) or one should always resort to manual observation.

>  
>  Thanks
>  Harish
>  


-- 
Grégory Mermoud <gregory.mermoud@epfl.ch>
Master student in Computer Science
School of Computer and Communication Sciences
Swiss Federal Institute of Technology - Lausanne (EPFL)
<http://ic2.epfl.ch/~gmermoud>

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