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[partial-reconfig] DPR Tools BM & Information



Hello team

 

My name is Michael and we are intending to develop Software and Tools for DPR designer.

 

We are currently newbie to the DPR and we need your advice and help!!

 

  1. First the Bus Macro – It seem to me important to make it simple and to develop Bus Macro that don't use tri state for the Virtex 4 device. I need link to information and example of BM development using the XDL and the FPGA Editor. I heard about a tutorial on Bus Macro – DPR tutorial by Gregory Mermoud I will be glad to have a link to it and to similar information
  2. Our business development teams are searching for DPR application and Tool needed. I will be glad to get suggestions and needs.
  3. The frame to CLB connection and the Bit Stream mapping is an important issue. We have this mapping only for the Virtex II Pro device as documented by Xilinx.  It will help to have this link to Virtex 4 Mapping and to Spartan III mapping.
  4. We heard from Xilinx that Virtex 4 PR modular design isn't support till ISE 8.1. There is no Bus Macro, no ICAP driver and no PR Bit Stream generation available. If some one made a progress on one of this issue please inform us
  5. It is very interest me – does anyone use the PR for a real design or it is still proper academic.
  6. Can you name real application for PR and Dynamic PR? We will be glad to communicate with people that have in mind a real need for PR.
  7. We will be happy to learn on existing tools, tutorials, documentation ICAP drivers' ext… It also needed to concentrate it in single Web Page. I will be happy to offer our web site for this purpose – our web site is under construction any way!!

Regards,

 

Michael Zilbershlag - CEO

Genesis-OS

Michael@genesis-os.com

Tel: 972-77-4000861

Cell:972-50-8807135

Fax:972-3-5327307

www.genesis-os.com

 


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