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RE: [partial-reconfig] Reconfiguring columns that have activesignals
Hello,
I made exactly what you mentioned, pass the reset signal from a button in the
reconfigurable are to the fixed area through a bus macro. This reset signal was
connected to the SCP that controls the self-reconfiguration process. I has many
problems because during the reconfiguration that line becomes "crazy" and the
SCP resets making impossible to continue reconfiguring the system.
Fortunately VirtexII makes a ROC (Reset on configuration) during the initial
configuration that resets the SCP and makes possible to run the application
without an external reset button.
From my experience is not a good idea to pass peripherals pins from one area to
another through very long lines that cross the whole FPGA. I had many problems
with those long paths.
Regards
Javier Castillo
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