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[partial-reconfig] Virtex-4 slice-based bus macros
There have been a couple of requests for help on the V4 slice-based bus
macros. They're not hard to make, but to simplify things I thought I'd
post this little FPGA Editor script which makes one for you.
Cut and paste the lines between the <snip>s into a file called
macro.scr. *Make sure the lines starting "setattr comp ..." don't have
newlines in them*. Then run the script using the FPGA Editor
(Tools->Scripts->Playback...). I've run it using ISE 6.3i, and don't
know if it works on other versions. It will create a file
bm_v4_eastwest.nmc, which is the slice macro. The Verilog template for
the macro is:
module bm_v4_eastwest (
I,
O,
EN
);
input [1:0] I;
output [1:0] O;
input [1:0] EN;
endmodule
The output O<n> is the AND of the input I<n> and the enable EN<n>. It's
easy enough to modify this for other signal widths, and other directions
(north->south etc). But this is only a small step towards dynamic
reconfiguration on the V4...
Have fun.
Pete
--- <snip> ---
# This is an fpga_editor script which will create a slice based bus macro
# for signals heading east -> west.
create macro bm_v4_eastwest.nmc "virtex4" "xc4vlx15" "ff668" "10"
unselect -all
# add component sites
select site "SLICE_X0Y2"
add
setattr comp $COMP_0 Name s0
unselect -all
select site "SLICE_X2Y2"
add
setattr comp $COMP_1 Name s1
unselect -all
# add properties of components
select comp "s1"
setattr comp s1 Feqn A1*A2
setattr comp s1 Geqn A1*A2
# The following should be all on one line
setattr comp s1 Config COUTUSED:\#OFF\ YUSED:0\ XUSED:0\ F5USED:\#OFF
\ YBMUX:\#OFF\ CYINIT:\#OFF\ F:\#LUT:D=A1\*A2\ REVUSED:\#OFF\
SYNC_ATTR:\#OFF
\ SRFFMUX:\#OFF\ FFY_SR_ATTR:\#OFF\ FFX:\#OFF\ FFY:\#OFF\ FFX_SR_ATTR:\#OFF
\ G_ATTR:\#OFF\ DIG_MUX:\#OFF\ CY0G:\#OFF\ FXUSED:\#OFF\ DIF_MUX:\#OFF
\ F_ATTR:\#OFF\ CY0F:\#OFF\ DIGUSED:\#OFF\ SHIFTOUTUSED:\#OFF
\ BYOUTUSED:\#OFF\ FFX_INIT_ATTR:\#OFF\ FFY_INIT_ATTR:\#OFF\
G:\#LUT:D=A1\*A2
\ XBMUX:\#OFF\ BYINVOUTUSED:\#OFF\ SLICEWE1USED:\#OFF\ WF1USED:\#OFF
\ WF2USED:\#OFF\ WF3USED:\#OFF\ WF4USED:\#OFF\ WG1USED:\#OFF\ WG2USED:\#OFF
\ WG3USED:\#OFF\ WG4USED:\#OFF\ YBUSED:\#OFF\ BYINV:\#OFF\ BXINV:\#OFF
\ CEINV:\#OFF\ CLKINV:\#OFF\ SRINV:\#OFF\ SLICEWE0USED:\#OFF\ YMUXUSED:\#OFF
\ DYMUX:\#OFF\ GYMUX:\#OFF\ XMUXUSED:\#OFF\ DXMUX:\#OFF\ XBUSED:\#OFF
\ FXMUX:\#OFF
unselect -all
select comp "s0"
setattr comp s0 Feqn A1
setattr comp s0 Geqn A1
# The following should be all on one line
setattr comp s0 Config COUTUSED:\#OFF\ YUSED:0\ XUSED:0\ F5USED:\#OFF
\ YBMUX:\#OFF\ CYINIT:\#OFF\ F:\#LUT:D=A1\ REVUSED:\#OFF\ SYNC_ATTR:\#OFF
\ SRFFMUX:\#OFF\ FFY_SR_ATTR:\#OFF\ FFX:\#OFF\ FFY:\#OFF\ FFX_SR_ATTR:\#OFF
\ G_ATTR:\#OFF\ DIG_MUX:\#OFF\ CY0G:\#OFF\ FXUSED:\#OFF\ DIF_MUX:\#OFF
\ F_ATTR:\#OFF\ CY0F:\#OFF\ DIGUSED:\#OFF\ SHIFTOUTUSED:\#OFF\
BYOUTUSED:\#OFF
\ FFX_INIT_ATTR:\#OFF\ FFY_INIT_ATTR:\#OFF\ G:\#LUT:D=A1\ XBMUX:\#OFF
\ BYINVOUTUSED:\#OFF\ SLICEWE1USED:\#OFF\ WF1USED:\#OFF\ WF2USED:\#OFF
\ WF3USED:\#OFF\ WF4USED:\#OFF\ WG1USED:\#OFF\ WG2USED:\#OFF\ WG3USED:\#OFF
\ WG4USED:\#OFF\ YBUSED:\#OFF\ BYINV:\#OFF\ BXINV:\#OFF\ CEINV:\#OFF
\ CLKINV:\#OFF\ SRINV:\#OFF\ SLICEWE0USED:\#OFF\ YMUXUSED:\#OFF\ DYMUX:\#OFF
\ GYMUX:\#OFF\ XMUXUSED:\#OFF\ DXMUX:\#OFF\ XBUSED:\#OFF\ FXMUX:\#OFF
unselect -all
# add nets
select pin "SLICE_X2Y2.X"
select pin "SLICE_X0Y2.F1"
add
setattr net $SIG_0 name n0
unselect -all
select pin "SLICE_X2Y2.Y"
select pin "SLICE_X0Y2.G1"
add
setattr net $SIG_1 name n1
unselect -all
# add pins - outputs
unselect -all
select pin "SLICE_X0Y2.X"
add extpin
setattr pin SLICE_X0Y2.X external_name O<0>
unselect -all
select pin "SLICE_X0Y2.Y"
add extpin
setattr pin SLICE_X0Y2.Y external_name O<1>
# add pins - inputs
unselect -all
select pin "SLICE_X2Y2.F1"
add extpin
setattr pin SLICE_X2Y2.F1 external_name I<0>
unselect -all
select pin "SLICE_X2Y2.G1"
add extpin
setattr pin SLICE_X2Y2.G1 external_name I<1>
# add pins - enables
unselect -all
select pin "SLICE_X2Y2.F2"
add extpin
setattr pin SLICE_X2Y2.F2 external_name EN<0>
unselect -all
select pin "SLICE_X2Y2.G2"
add extpin
setattr pin SLICE_X2Y2.G2 external_name EN<1>
save
end
--- <snip> ---
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