[partial-reconfig] problem during assembling of dynamic module - VirtexPro2

[DPR DPR <b_kk1@xxxxxxxxx>]

Hi,

            I am trying DPR using Mr.Mermoud tutorial. I am at the last stage of the assembling of modules. I could able to do mapping with out any problem. But PAR is always finishing with one warning message that, it could not able to route all the signals.

 

I tried 2 or three time with different placement of BM (horizontal position is always fixed... I am always changing the vertical position as per the guidelines). Every time I am getting the same warning message but the number of un-routed signals is varying?. one time it was 1 other time it was 6.

 

My environment is

 

FPGA           - VirtexPro2

Synthesis tool - XST

Bus macro      - Original Xilinx Bus macro

ISE Version    - 7.1i

 

Do i have to route manually?

 

I would be thankful for any help

  

My ucf file contains following information.

 

AREA_GROUP "AG_myReg" MODE=RECONFIG;

AREA_GROUP "AG_increm" MODE=RECONFIG;

 

# Start of Constraints extracted by Floorplanner from the Design

INST "bufg_clk" LOC = "BUFGMUX0S" ;

NET "zeroR" LOC = "A3" ;

NET "zeroL" LOC = "A28" ;

NET "result<7>" LOC = "D2" ;

NET "result<6>" LOC = "H5" ;

NET "result<5>" LOC = "E2" ;

NET "result<4>" LOC = "F4" ;

NET "result<3>" LOC = "J5" ;

NET "result<2>" LOC = "G1" ;

NET "result<1>" LOC = "J2" ;

NET "result<0>" LOC = "K6" ;

NET "reset" LOC = "J3" ;

NET "oneR" LOC = "C5" ;

NET "oneL" LOC = "C26" ;

NET "enable" LOC = "K4" ;

NET "clk" LOC = "D15" ;

 

INST "increm" AREA_GROUP = "AG_increm" ;

AREA_GROUP "AG_increm" RANGE = SLICE_X0Y159:SLICE_X43Y0 ;

AREA_GROUP "AG_increm" RANGE = TBUF_X0Y159:TBUF_X42Y0 ;

AREA_GROUP "AG_increm" RANGE = RAMB16_X0Y0:RAMB16_X3Y18 ;

AREA_GROUP "AG_increm" RANGE = MULT18X18_X0Y0:MULT18X18_X3Y18 ;

 

INST "myReg" AREA_GROUP = "AG_myReg" ;

AREA_GROUP "AG_myReg" RANGE = SLICE_X44Y159:SLICE_X91Y0 ;

AREA_GROUP "AG_myReg" RANGE = TBUF_X44Y159:TBUF_X90Y0 ;

AREA_GROUP "AG_myReg" RANGE = RAMB16_X4Y1:RAMB16_X7Y19 ;

AREA_GROUP "AG_myReg" RANGE = MULT18X18_X4Y1:MULT18X18_X7Y19 ;

 

INST "busRegToInc/bus1" LOC = "TBUF_X40Y120" ;

INST "busRegToInc/bus2" LOC = "TBUF_X40Y128" ;

INST "busIncToReg/bus1" LOC = "TBUF_X40Y136" ;

INST "busIncToReg/bus2" LOC = "TBUF_X40Y144" ;

 

Regards,

Kathik

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