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Re: [partial-reconfig] Re: [microblaze-uclinux] Adding bootloop to a bitstream made outside EDK
John,
I tried the following:
bitinit system.mhs -bm implementation/system_bd.bmm -pe microblaze_0
bootloops/microblaze_0.elf -bt static_full.bit -o download.bit
Unfortunately this does not work and I get attached error that ends
with:
ERROR:Data2MEM:89 - Unrecognized register address 10 in .bit file,
'static_full.bit'.
I've attached the full error file. Do you think this is a problem
with the my the PlanAhead bitsteam or the EDK files (elf, bmm, mhs)?
Thanks,
David
John Williams wrote
Adding
-bm implementation/system_bd.bmm
to your bitinit command line should do the trick.
John
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C:\EDK\mb1>bitinit system.mhs -bm implementation/system_bd.bmm -pe microblaze_0
bootloops/microblaze_0.elf -bt static_full.bit -o download.bit
bitinit version Xilinx EDK 8.2 Build EDK_Im.14
Copyright (c) Xilinx Inc. 2002.
Parsing MHS File system.mhs...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/microblaze_v5_00_a/data/microblaze_v2_1_0.
tcl ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_mdm_v2_00_a/data/opb_mdm_v2_1_0.tcl
...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v2_00_a/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/mch_opb_ddr_v1_00_b/data/mch_opb_ddr_v2_1_
0.tcl ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_intc_v1_00_c/data/opb_intc_v2_1_0.tcl
...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/dcm_module_v1_00_a/data/dcm_module_v2_1_0.
tcl ...
Overriding IP level properties ...
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 67 - tool overriding c_family value virtex2 to
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 68 - tool overriding c_instance value microblaze to microblaze_0
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 102 - tcl overriding C_ADDR_TAG_BITS value 17 to 14
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 110 - tcl overriding C_DCACHE_ADDR_TAG value 17 to 14
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd
line 42 - tool overriding c_family value virtex2 to
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd line 42 - tool overriding c_family value virtex2 to
mch_opb_ddr (ddr_256mb_32mx64_rank1_row13_col10_cl2_5) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\mch_opb_ddr_v1_00_b\data\mch_opb_ddr_v2_1_
0.mpd line 44 - tool overriding c_family value virtex2p to
opb_timer (opb_timer_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_timer_v1_00_b\data\opb_timer_v2_1_0.mp
d line 35 - tool overriding c_family value virtex2 to
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd
line 37 - tool overriding c_family value virtex2 to
dcm_module (dcm_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\dcm_module_v1_00_a\data\dcm_module_v2_1_0.
mpd line 60 - tool overriding c_family value virtex2 to
dcm_module (dcm_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\dcm_module_v1_00_a\data\dcm_module_v2_1_0.
mpd line 60 - tool overriding c_family value virtex2 to
opb_hwicap (opb_hwicap_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_hwicap_v1_00_b\data\opb_hwicap_v2_1_0.
mpd line 38 - tool overriding c_family value virtex2 to
Performing IP level DRCs on properties...
Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Address Map for Processor microblaze_0
(0x00000000-0x00001fff) dlmb_cntlr dlmb
(0x00000000-0x00001fff) ilmb_cntlr ilmb
(0x30000000-0x3fffffff) DDR_256MB_32MX64_rank1_row13_col10_cl2_5 mb_opb
(0x30000000-0x3fffffff) DDR_256MB_32MX64_rank1_row13_col10_cl2_5 ixcl
(0x30000000-0x3fffffff) DDR_256MB_32MX64_rank1_row13_col10_cl2_5 dxcl
(0x40200000-0x4020ffff) opb_hwicap_0 mb_opb
(0x40600000-0x4060ffff) RS232_Uart_1 mb_opb
(0x41200000-0x4120ffff) opb_intc_0 mb_opb
(0x41400000-0x4140ffff) debug_module mb_opb
(0x41c00000-0x41c0ffff) opb_timer_1 mb_opb
Initializing Memory...
INFO:MDT - BRAM lmb_bram will be initialized with ELF of processor microblaze_0
Running Data2Mem with the following command:
data2mem -bm implementation/system_bd.bmm -bt static_full.bit -bd
bootloops/microblaze_0.elf tag microblaze_0 -o b download.bit
ERROR:MDT - Data2Mem generated errors during execution
C:\EDK\mb1>bitinit system.mhs -bm implementation/system.bmm -pe microblaze_0 boo
tloops/microblaze_0.elf -bt static_full.bit -o download.bit
bitinit version Xilinx EDK 8.2 Build EDK_Im.14
Copyright (c) Xilinx Inc. 2002.
Parsing MHS File system.mhs...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/microblaze_v5_00_a/data/microblaze_v2_1_0.
tcl ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_mdm_v2_00_a/data/opb_mdm_v2_1_0.tcl
...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v2_00_a/data/lmb_bram_if
_cntlr_v2_1_0.tcl ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/mch_opb_ddr_v1_00_b/data/mch_opb_ddr_v2_1_
0.tcl ...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/opb_intc_v1_00_c/data/opb_intc_v2_1_0.tcl
...
Sourcing tcl file
C:/EDK/hw/XilinxProcessorIPLib/pcores/dcm_module_v1_00_a/data/dcm_module_v2_1_0.
tcl ...
Overriding IP level properties ...
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 67 - tool overriding c_family value virtex2 to
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 68 - tool overriding c_instance value microblaze to microblaze_0
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 102 - tcl overriding C_ADDR_TAG_BITS value 17 to 14
microblaze (microblaze_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v5_00_a\data\microblaze_v2_1_0.
mpd line 110 - tcl overriding C_DCACHE_ADDR_TAG value 17 to 14
opb_mdm (debug_module) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_mdm_v2_00_a\data\opb_mdm_v2_1_0.mpd
line 42 - tool overriding c_family value virtex2 to
bram_block (lmb_bram) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
mpd line 42 - tool overriding c_family value virtex2 to
mch_opb_ddr (ddr_256mb_32mx64_rank1_row13_col10_cl2_5) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\mch_opb_ddr_v1_00_b\data\mch_opb_ddr_v2_1_
0.mpd line 44 - tool overriding c_family value virtex2p to
opb_timer (opb_timer_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_timer_v1_00_b\data\opb_timer_v2_1_0.mp
d line 35 - tool overriding c_family value virtex2 to
opb_intc (opb_intc_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd
line 37 - tool overriding c_family value virtex2 to
dcm_module (dcm_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\dcm_module_v1_00_a\data\dcm_module_v2_1_0.
mpd line 60 - tool overriding c_family value virtex2 to
dcm_module (dcm_1) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\dcm_module_v1_00_a\data\dcm_module_v2_1_0.
mpd line 60 - tool overriding c_family value virtex2 to
opb_hwicap (opb_hwicap_0) -
C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_hwicap_v1_00_b\data\opb_hwicap_v2_1_0.
mpd line 38 - tool overriding c_family value virtex2 to
Performing IP level DRCs on properties...
Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
Address Map for Processor microblaze_0
(0x00000000-0x00001fff) dlmb_cntlr dlmb
(0x00000000-0x00001fff) ilmb_cntlr ilmb
(0x30000000-0x3fffffff) DDR_256MB_32MX64_rank1_row13_col10_cl2_5 mb_opb
(0x30000000-0x3fffffff) DDR_256MB_32MX64_rank1_row13_col10_cl2_5 ixcl
(0x30000000-0x3fffffff) DDR_256MB_32MX64_rank1_row13_col10_cl2_5 dxcl
(0x40200000-0x4020ffff) opb_hwicap_0 mb_opb
(0x40600000-0x4060ffff) RS232_Uart_1 mb_opb
(0x41200000-0x4120ffff) opb_intc_0 mb_opb
(0x41400000-0x4140ffff) debug_module mb_opb
(0x41c00000-0x41c0ffff) opb_timer_1 mb_opb
Initializing Memory...
INFO:MDT - BRAM lmb_bram will be initialized with ELF of processor microblaze_0
Running Data2Mem with the following command:
data2mem -bm implementation/system.bmm -bt static_full.bit -bd
bootloops/microblaze_0.elf tag microblaze_0 -o b download.bit
WARNING:Data2MEM:47 - Not all BitLanes in ADDRESS_SPACE
'microblaze_0.lmb_bram_combined' have BMM location constraints.
Some data for this ADDRESS_SPACE may have been lost during BIT file
replacement.
Bitlane(s)
----------------
lmb_bram/lmb_bram/ramb16_s9_s9_0 [31:24]
lmb_bram/lmb_bram/ramb16_s9_s9_1 [23:16]
lmb_bram/lmb_bram/ramb16_s9_s9_2 [15:8]
lmb_bram/lmb_bram/ramb16_s9_s9_3 [7:0]
ERROR:Data2MEM:89 - Unrecognized register address 10 in .bit file,
'static_full.bit'.
ERROR:MDT - Data2Mem generated errors during execution