I was wondering if someone could plz give me some advice on how to integrate a XPS/EDK project and Planahead to accomplish dynamic partial reconfiguration. The softwares that I am using are: ISE 8.2.01i_PR_2, EDK 8.2
and PlanAhead 9.1.5. My target hardware is the V2P-XUP development board.
I was able to successfully perform simple dynamic partial reocnfiguration on the V2P-XUP development borad using ISE 8.2.01i_PR_2 and PlanAhead 9.1.5. I can dynmically swap out a pre-defined region and put in a new version (
e.g. different rate of blinking LEDs via different clock dividers). My code is written in VHDL. The static region simply relays the signals from the bus macros out of the reconfigurable part to the correct pins.
I am now trying to integrate a Microblaze into the my system to be placed in the static region and having peripherals connectied as partial reconfiguration modules. However, I am having a lot of trouble. I first would like to use Microblaze to again control the blinking rate of the LEDs using a reconfigurable clock divider. For simplicy, the MB communicate to the reconfigurable clock divider using a GPIO.
My system is developed and tested okay on the EDK, but I could not implment it using PlanAhead to generate the partial bit stream. I created a top.vhd file that instiniated a static portion (e.g. Microblaze, uart,...etc), dynamic portion (reconfigurable clock dividers), bus macros for communication and buffers. I imported the all the .ngc files the EDK into PlanAhead and passed the DRC test okay. However, the processor does not seem to do anything (perhaps no software is "loaded")??? Again to keep things simple, I avoided using DCM for now.
Could somone plz let me know the steps required to integrate Microblaze with EDK/XPS and Planahead?? I first would like to implement this simple example before using DPR for customized periperhals.
Thank you
Edward Chen