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Re: [partial-reconfig] Simple partial reconfiguration basci system example

Hello,

I'm also working on partial reconfiguration using a Virtex4-FX20
device(ML405). As I only have ISE/EDK 8.1 available at the moment, whose
HWICAP does not support V4 device, I extracted the HWICAP updates from
the latest EDK 9.1 service pack. But, too, I was only successful to read
out the status registers. When I send a partial bitstream to the HWICAP
device, no reconfiguration takes place and the CRC-Error bit is set in
the status register. This explains why no reconfiguration takes place.
When writing the same partial bitstream via iMPACT to the FPGA all is fine.

The Xilinx HWICAP driver are plain C. You can have a look at their
source code which is located in

%EDK%\sw\XilinxProcessorIPLib\drivers\hwicap_*

Furthermore, Xilinx has published a new reference design for partial
reconfiguration:

http://www.xilinx.com/support/prealounge/protected/archive_82.htm

Quote: "Virtex 4 EDK design with a Microblaze processor. The partially
reconfigurable filters are peripherals of the Microblaze processor.
Target hardware is the Virtex ML401 development board."

Best regards,
Andreas

Fabian Schulte schrieb:
> Hello to everyone and especially Elisa and Vincent,
> I tried do build such a System with a PPC and the ICAP Interface. But I
> could only read out the IDCODE register. A partial reconfiguration (with
> the set_Configuration function of the EDK HWICAP driver) was not
> successful. I already wrote a Message to this Mailing list on 26.07.2007.
> 
> If one of you has such a System with a microcontroller and ICAP,  i was
> very thankful for any hints or Code fragments.
> 
> Thank you very much.
> Fabian Schulte

-- 
Dipl.-Informatiker Andreas Hofmann

Johann Wolfgang Goethe-Universität Frankfurt am Main

Fachbereich Informatik und Mathematik
Institut für Informatik
Professur für Technische Informatik

Robert-Mayer-Straße 11-15
D-60325 Frankfurt am Main

Tel.: +49 69 798-28252
Fax : +49 69 798-22351
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