Re: [partial-reconfig] Has anyone used ICAP of Virtex-4?

Subject: Re: [partial-reconfig] Has anyone used ICAP of Virtex-4?

From: "Ricardo Jardel Nunes da Silveira" <jardel.silveira@xxxxxxxxx>

Date: Mon, 17 Sep 2007 06:50:49 -0300

Dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:in-reply-to:mime-version:content-type:references; bh=hj8WYVQPnDsqA07cX4LHrAn4h7ihiF7PbJFzP40WE1I=; b=LgN8oSS/AuCth/G9BEN7trUkUnmesTSVxjFscfT/P8MCsAjGfZ/YzCoVsJJr03CK7tSGd8k50WX9wCN4nEJXcM7YyompOcBoFitRkkphp4nAwEeoj+HkPGtC2JGSDhSfmhXJ+ijTSnu+IOQn9cjJCShAGKktUGfY85bRdmH59f8=

Domainkey-signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:in-reply-to:mime-version:content-type:references; b=MC6IHByieucud8JPMQ6DY3x/u11VKgJ0WddhUDZ2vHGtpdBW0Z9QVbFtboFV+K6eZnAS0TuSEZjL7T4Ap6epguqH/vDbqZy5jbP7dd++ZyS974AI5+sg2LnxnTYW6IFwfx4/1dTrKZv5y7d3cqquOcSvtll87Q9k1bk7uRev+1o=

In-reply-to: <F5DA3932-61DB-4260-9135-B59EB0CDF766@xxxxxxxxxxxxxxxx>

References: <460a140b0709170023k23e1daic80aeae704661f92@xxxxxxxxxxxxxx> <F5DA3932-61DB-4260-9135-B59EB0CDF766@xxxxxxxxxxxxxxxx>

Reply-to: partial-reconfig@xxxxxxxxxxxxxx

Sender: owner-partial-reconfig@xxxxxxxxxxxxxx

2007/9/17, Enno Luebbers < enno.luebbers@xxxxxxxxxxxxxxxx>:

Hi Peng,

Am 17.09.2007 um 09:23 schrieb lipeng:

> I plan to make self-reconfigurations on Virtex4 using ICAP. I
> noticed that the software API of ICAP provided by Xilinx had bugs:
> "Reading or writing to columns containing SRL16's or LUT RAM's can
> cause corruption of data in those elements." I don't know have much
> these bugs may hurt the reconfiguration.

That's actually not a bug of the hwicap API but a limitation of the
Virtex-II/Virtex-4 configuration architecture. The limitation has
three causes that work together:

1) SRL16s and distributed RAMs are realized with look-up tables
(LUTs). Their contents is stored directly in the LUT RAM.
2) With partial reconfiguration, you can only write complete frames,
even if your partial module does not span a whole frame (a device
column in Virtex-II, or 16 CLBs in Virtex-4).
3) On writing a partial bitstream, all the LUTs in the reconfigured
frame(s) are overwritten with the values from the bitstream.

Thus, when writing a partial bitstream, you overwrite all LUTs (=
SRL16s and LUT RAMs that have changed since their initialization)
that are located in the same configuration frame above or beneath
your reconfigurable module. You can work around this either

a) by letting your partial module span a full frame height (useful on
Virtex-4; does work on Virtex-II but complicates routing to the IOBs
on the top and bottom), or
b) by making sure that the static logic above and beneath your module
does not contain SRL16s or distributed RAM (tricky).

Hope that helps,
Enno
--
Dipl.-Ing. Enno Lübbers
Fachgebiet Technische Informatik
Universität Paderborn

Warburger Str. 100
33098 Paderborn

http://wwwcs.upb.de/cs/ag-platzner
Telefon: 05251 / 60-5397
Telefax: 05251 / 60-5377

___________________________
partial-reconfig mailing list
partial-reconfig@xxxxxxxxxxxxxx
Mailing List Archive : http://www.itee.uq.edu.au/~listarch/partial-reconfig/