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RE: [partial-reconfig] on Xilinx's PR reference design



I will send you.
Mati

-----Original Message-----
From: owner-partial-reconfig@xxxxxxxxxxxxxx
[mailto:owner-partial-reconfig@xxxxxxxxxxxxxx] On Behalf Of Alonzo Vera
Sent: Tuesday, December 18, 2007 7:33 PM
To: partial-reconfig@xxxxxxxxxxxxxx
Subject: [partial-reconfig] on Xilinx's PR reference design

Hello all,
I am new on this list. I've seen posts referring to Xilinx's reference 
design on the ML401 (the only reference design using EDK and PlanAhead 
that I know about). I have the same issues that many people have 
reported here: looks like the software/drivers provided are not working 
they way they should.
I've seen a post by Mati Nahshon offering an updated version of the 
software, but I'm not sure if it was ever posted online somewhere. Could 
somebody (Mati, are still on the list?) refer me to it please?
Thank you in advance,
Alonzo.

-- 
Alonzo Vera


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Mailing List Archive : http://www.itee.uq.edu.au/~listarch/partial-reconfig/