[partial-reconfig] Issue with Address decoding in opb_socket.vhd from audio design PR example

[Andreas Hofmann <ahofmann@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>]

Hi,

I found an issue related to the OPB address decoding in opb_socket.vhd 
from the Audio Design Partial Reconfiguration example provided by Xilinx.

The address decoding for the partially reconfigurable OPB slave device 
is done partially by the opb_socket_bridge module to avoid setting the 
actual OPB address parameters in the opb_PRR module. The opb_PRR module 
uses an address range of 0x00000000 - 0x0000FFFF regardless of the 
address range of the opb_socket_bridge. The opb_socket_bridge masks out 
all bits of the OPB address not used by the opb_PRR module. This should 
be done in line 198 in opb_socket.vhd

> Socket2PRR_ABus <= OPB_ABUS & C_MASKADDR; <

which concatenates both vectors and effectively sets Socket2PRR_ABus to 
C_MASKADDR thereby setting the address seen by opb_PRR to a fixed value.

This behavior does not show up as an error in the audio example as there 
is only one register.

Changing the line to

> Socket2PRR_ABus <= OPB_ABUS and C_MASKADDR; <

should fix this issue.

Best regards,
Andreas

--
Dipl.-Informatiker Andreas Hofmann

Johann Wolfgang Goethe-University Frankfurt am Main

Faculty of Computer Science and Mathematics
Department of Computer Science
Computer Engineering Chair

Robert-Mayer-Straße 11-15
D-60325 Frankfurt am Main

Tel.: +49 69 798-28252
Fax : +49 69 798-22351
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